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Details, datasheet, quote on part number:IC61LV25616-8K
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Datasheet text preview:
IC61LV25616
Document Title
256K x 16 Hight Speed SRAM with 3.3V
Revision History
Revision No
0A
1
Draft Date Remark
September 11,2001
History
Initial Draft
2 3 4 5 6 7 8 9 10 11 12
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR022-0A 09/11/2001
1
IC61LV25616
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY
FEATURES
· · · · · High-speed access time: 8, 10, 12, and 15 ns CMOS low power operation TTL compatible interface levels Single 3.3V ± 10% power supply Fully static operation: no clock or refresh required · Three state outputs · Data control for upper and lower bytes · Industrial temperature available
DESCRIPTION The ICSI IC61LV25616 is a high-speed, 4,194,304-bit static
RAM organized as 262,144 words by 16 bits. It is fabricated using ICSI's high-performance CMOS technology. This highly r e l i a b l e process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. T h e IC61LV25616 is packaged in the JEDEC standard 44-pin 400mil SOJ, 44 pin 400mil TSOP-2 and 48-pin 6*8 TFBGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16 MEMORY ARRAY
VCC GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT
COLUMN I/O
CE OE WE UB LB CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
AHSR022-0A 09/11/2001
IC61LV25616
PIN CONFIGURATIONS
44-Pin TSOP-2 and SOJ 48-Pin TF-BGA
1
A0 A1 A2 A3 A4 CE I/O0 I/O1 I/O2 I/O3 Vcc GND I/O4 I/O5 I/O6 I/O7 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A17 A16 A15 OE UB LB I/O15 I/O14 I/O13 I/O12 GND Vcc I/O11 I/O10 I/O9 I/O8 NC A14 A13 A12 A11 A10
2
OE UB I/O2 I/O3 I/O4 I/O5 NC A8
3
A0 A3 A5 A17 NC A14 A12 A9
4
A1 A4 A6 A7 A16 A15 A13 A10
5
A2 CE I/O10 I/O11 I/O12 I/O13 WE A11
6
N/C I/O8 I/O9 Vcc GND I/O14 I/O15 NC
1 2 3 4 5 6 7
A B C D E F G H
LB I/O0 I/O1 GND Vcc I/O6 I/O7 NC
PIN DESCRIPTIONS
A0-A17 I/O0-I/O15 CE OE WE Address Inputs Data Inputs/Outputs Chip Enable Input Output Enable Input Write Enable Input LB UB NC Vcc GND Lower-byte Control (I/O0-I/O7) Upper-byte Control (I/O8-I/O15) No Connection Power Ground
8 9 10
TRUTH TABLE
Mode Not Selected Output Disabled Read WE X H X H H H L L L CE H L L L L L L L L OE X H X L L L X X X LB X X H L H L L H L UB X X H H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN Vcc Current ISB1, ISB2 ICC ICC
11 12
Write
ICC
Integrated Circuit Solution Inc.
AHSR022-0A 09/11/2001
3
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