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Details, datasheet, quote on part number:IC62LV5128LL-70T
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Datasheet text preview:
IC62LV5128L IC62LV5128LL
Document Title
512Kx8 bit Low Voltage and Ultra Low Power CMOS Static RAM
Revision History
Revision No
0A 0B
History
Initial Draft
Draft Date
May 1,2001
Remark
Preliminary
1. Change for tPWE: 45 to 40 ns for 55 ns product August 31,2001 : 60 to 40 ns for 70 ns product 2. Change for VCC: 2.2-3.6V to 2.7-3.6V 3.1 Change for ICC test conditiomn: VCC=Max. to 3V 3.2 Change for ICC: 30 to 25mA for 55 ns product 25 to 20mA for 70 ns porduct 20 to 15 mA for 100 ns product 4.1 Change for VDR Min. : 1.2 to 1.5V 4.2 Change for IDR test condition: VCC=1.2 to 1.5V and IDR 5. Change for tHZCE 25 to 20 ns for 55 ns product 6. Change for tHZWE 33 to 30 ns for 70 ns product
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
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IC62LV5128L IC62LV5128LL
512K x 8 LOW POWER and LOW VCC CMOS STATIC RAM
FEATURES
· Access times of 55, 70, 100 ns · CMOS Low power operation: -- 60 mW (typical) operation -- 3 µW (typical) standby · Low data retention voltage: 1.5V (min.) · Output Enable (OE) and Chip Enable (CE) inputs for ease in applications · TTL compatible inputs and outputs · Fully static operation: -- No clock or refresh reguired · Single 2.7V-3.6V power supply · Available in the 32-pin 8*20mm TSOP-1, 32-pin 8*13.4mm TSOP-1 and 48-pin 6*8mm TF-BGA
DESCRIPTION The ICSI IC62LV5128L and IC62LV5128LL is a low voltage, ICSI's low voltage, six transistor (6T), CMOS technology. The
device is targeted to satisfy the demands of the state-of-the-art technologies such as cell phones and pagers. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Additionally, easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable ( WE) controls both writing and reading of the memory. The IC62LV5128L and IC62LV5128LL are available in 32-pin 8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TFBGA. 524,288 words by 8 bits, CMOS SRAM. It is fabricated using
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K x 8 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
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Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
IC62LV5128L IC62LV5128LL
PIN CONFIGURATIONS
32-Pin 8*20mm TSOP-1, 8*13.4mm STSOP-1
A11 A9 A8 A13 WE A17 A15 Vcc A18 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3
48-Pin 6*8mm TF-BGA
1 A B C D E F G H
A0 I/O4 I/O5 GND Vcc I/O6 I/O7 A9
2
A1 A2
3
NC WE NC
4
A3 A4 A5
5
A6 A7
6
A8 I/O0 I/O1 Vcc GND
A18 OE A10 CE A11
A17 A16 A12 A15 A13
I/O2 I/O3 A14
PIN DESCRIPTIONS
A0-A18 CE OE WE I/O0-I/O7 NC Vcc GND Address Inputs Chip Enable Input Output Enable Input Write Enable Input Data Input/Output No Connection Power Ground
TRUTH TABLE
Mode Not Selected Output Disabled Read Write WE X H H L CE H L L L OE X H L X I/O Operation High-Z High-Z DOUT DIN Vcc Current ISB1, ISB2 ICC ICC ICC
OPERATING RANGE
Range Commercial Industrial Ambient Temperature 0°C to +70°C 40°C to +85°C VCC 2.7V - 3.6V 2.7V - 3.6V
Integrated Circuit Solution Inc.
LPSR012-0B 08/31/2001
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