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Part: 8501BY
Category:
Timing Circuits
-> Clock Buffers
Description:
Company: Integrated Circuit System
Datasheet: Download 8501BY datasheet File size : 44 kB
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Datasheet text preview:
Integrated Circuit Systems, Inc.
LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
FE ATURES
· 16 small swing DCM outputs · Translates any differential input signal(PECL, HSTL, LVDS, DCM) to DCM levels without external bias networks · Translates single ended input levels to DCM levels with a resistor bias network on the nCLK input · Translates single ended input levels to inverted DCM levels with a resistor bias network on the CLK input · Voh(max) = 1.2V · 40% of Voh Vcrossover 60% of Voh · 45% Duty Cycle 55% · Output frequency up to 500MHz · 100ps output skew · 3.3V operating supply · 48 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm package body, 0.5mm package lead pitch · 0°C to 70°C ambient operating temperature
ICS8501
The ICS8501 is a low skew, 1-to-16 Differential Current Mode Fanout Buffer and a member of H iPer Cl ockSTM t h e HiPerClockS family of High Performance Clock Solutions from ICS. The ICS8501 is designed to translate any differential signal levels to small swing differential current mode(DCM) output levels. An external reference resistor is used to set the value of the current supplied to an external load load/termination resistor. The load resistor value is chosen to equal the value of the characteristic line impedance of 50. The ICS8501 is characterized at an operating supply voltage of 3.3V.
GENERAL DESCRIPTION
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The small swing outputs, accurate crossover voltage and duty cycle makes the ICS8501 ideal for interfacing to todays most advanced microprocessors.
BLOCK DIAGRAM
CLK nCLK Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q 11 n Q 11 Q10 nQ10 Q9 nQ9 Q8 nQ8
PIN ASSIGNMENT
nCLK VCC Q15 nQ15 Q14 nQ14 GND Q13 nQ13 Q12 nQ12 VCC
VCC Q 11 n Q 11 Q10 nQ10 GND Q9 nQ9 Q8 nQ8 VCC nc
48 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 24
ICS8501
CLK VCC nQ0 Q0 nQ1 Q1 GND nQ2 Q2 nQ3 Q3 VCC
VCC nQ4 Q4 nQ5 Q5 GND nQ6 Q6 nQ7 Q7 VCC RREF
48-Lead LQFP Y Package Top View
8501
www.icst.com 1
REV. A - AUGUST 23, 2000
Integrated Circuit Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number 1, 11, 14, 24, 25, 35, 38, 48 2, 3 4, 5 6, 19, 30, 43 7, 8 9, 10 12 13 15, 16 17, 18 20, 21 22, 23 26, 27 28, 29 36 37 39, 40 41, 42 44, 45 46, 47 Name VCC Q11, nQ11 Q10, nQ10 GND Q9, nQ9 Q8, nQ8 nc RREF Q7, nQ7 Q6, nQ6 Q5, nQ5 Q4, nQ4 Q3, nQ3 Q2, nQ2 CLK nCLK Q15, nQ15 Q14, nQ14 Q13, nQ13 Q12, nQ12 Ty pe Pow er Output Output Pow er Output Output Unused Input Output Output Output Output Output Output Input Input Output Output Output Output Description
LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
ICS8501
Pow er supply pin. Connect to 3.3V. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Pow er supply pin. Connect to ground. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. No connection. Reference current input. Used to set the output current. Connect to 475 resistor to ground. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Non inverting differential clock input. Any differential input interface levels. Inverting differential clock input. Any differential input interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels. Differential output. Differential current mode interface levels.
TABLE 2. PIN CHARACTERISTICS
Sy mbol CIN CPD ROUT Parameter Input Capacitance Pow er Dissipation Capacitance (per output) Output Impedance Test Conditions VCC = 3.465V, f=250MHz Minimum Ty pical 2 4.6 14 Maximum Units pF pF K
TABLE 3. FUNCTION TABLE
Inputs CLK 0 1 0 1 Biased; NOTE 1 nCLK 1 0 Biased; NOTE 1 Biased; NOTE 1 0 Q0 thru Q15 0 1 0 1 1 Outputs nQ0 thru nQ15 1 0 1 0 0 Input to Output Mode Differential to Differential Differential to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Polarity Non Inverting Non Inverting Non Inverting Non Inverting Inverting
Biased; NOTE 1 1 0 1 Single Ended to Differential Inverting NOTE 1: Single ended use requires that one of the differential inputs be biased. The voltage at the biased input sets the sw itch point for the single ended input. For LVCMOS and LVTTL levels the recommended input bias netw ork is a resistor to VCC, a resistor of equal value to ground and a 0.1µF capacitor from the input to ground. The resulting sw itch point is approximately VCC/2 ± 300mV.
8501
www.icst.com 2
REV. A - AUGUST 23, 2000
Integrated Circuit Systems, Inc.
A BSOLUTE MAXIMUM RATINGS
Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature 4.6V -0.5V to VCC+0.5 V -0.5V to VCC+0.5V 0°C to 70°C -65°C to 150°C
LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
ICS8501
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4. DC ELECTRICAL CHARACTERISTICS, VCC = 3.3V±5%, TA = 0°C TO 70°C
Sy mbol VCC VPP VCMR IIH IIL ICC IOH VOH Parameter Operating Supply Voltage Peak-to-Peak Input Voltage Common Mode Input Voltage; NOTE 1 Input High Current Input Low Current CLK, nCLK CLK, nCLK LVPECL Levels DCM, HSTL, LVDS, SSTL Levels VIN = VCC VIN = 0V 3.135V VCC 3.465V RREF = 475 , RLOAD = 50 -5 70 11 0.6 14 0.71 17 1.2 Test Conditions Minimum 3.135 0.31 1.8 0.31 Ty pical 3.3 Maximum 3.465 1.3 2.4 1.3 5 Units V V V V µA µA mA mA V
Operating Supply Current Output Current; NOTE 2 Output High Voltage
VOL Output Low Voltage RREF = 475 , RLOAD = 50 0 0.05 V NOTE 1: Common mode input voltage for LVPECL is defined as the minimum VIH. The LVPECL values noted in Table 4A are for VCC = 3.3V. VCMR for LVPECL w ill vary 1:1 w ith VCC. Common mode input voltage for DCM, HSTL, LVDS and SSTL is defined as the crossover voltage. See Figure 1A and 1B. NOTE 2: IOH is the current per output being supplied to the load and should be included in the total supply current calculation. Therefore ICC(total) is equal to IOH times 16 plus ICC.
TABLE 5. AC ELECTRICAL CHARACTERISTICS, VCC = 3.3V±5%, TA = 0°C TO 70°C
Sy mbol fMAX tpLH tpHL tsk(o) tsk(pp) tR tF tPW VOX NOTE 1: NOTE 2: NOTE 3: NOTE 4: Parameter Maximum Input Frequency Propagation Delay, Low -to-High Propagation Delay, High-to-Low Output Skew ; NOTE 3 Part-to-Part Skew ; NOTE 4 Output Rise Time Output Fall Time Output Pulse Width Test Conditions Measured at the -3dB rolloff of the peak-to-peak output voltage 0 < f 250MHz 0 < f 250MHz Measured on at VOX Measured on at VOX 20% to 80% 20% to 80% 175 175 tCY CLE/2 - 0.3 40% VOH tCY CLE/2 Minimum Ty pical Maximum 500 2 2 3 3 100 650 700 700 tCY CLE/2 + 0.3 60% VOH Units MHz ns ns ps ps ps ps ns
Output Crossover Voltage V All parameters measured at 250MHz unless noted otherw ise. RREF equals 475 . Outputs terminated w ith 50 resistor connected to ground. Defined as skew across outputs at the same supply voltages and w ith equal load conditions. Defined as skew at different outputs on different devices operating at the same supply voltages and w ith equal load conditions.
8501
www.icst.com 3
REV. A - AUGUST 23, 2000
Integrated Circuit Systems, Inc.
FIGURE 1A, 1B, 1C - INPUT CLOCK WAVEFORMS
VCC
LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
ICS8501
CLK
VPP nCLK
CROSS POINTS VCMR
GND
FIGURE 1A - DCM, LVDS, HSTL, SSTL DIFFERENTIAL INPUT LEVELS
VCC
CLK
VPP nCLK
CROSS POINTS VCMR
GND
FIGURE 1B - LVPECL DIFFERENTIAL INPUT LEVEL
VCC CLK or nCLK GND
FIGURE 1C- LVCMOS AND LVTTL SINGLE ENDED INPUT LEVEL
8501
www.icst.com 4
REV. A - AUGUST 23, 2000
Integrated Circuit Systems, Inc.
FIGURE 2A
LOW SKEW 1-TO-16 DIFFERENTIAL CURRENT MODE FANOUT BUFFER
ICS8501
- TIMING WAVEFORMS
CLK
Vpp
nCLK tPHL Q0 thru Q15 tPLH
nQ0 thru nQ15
FIGURE 3A - PROPAGATION DELAYS
fin = 250MHz, Vpp = 300mV, tr = tf = 200ps
FIGURE 3A - OUTPUT SKEW DEFINITION & WAVEFORMS
Output Skew - Skew between any outputs. Outputs operating at the same temperature, supply voltages and with equal load conditions.
CLK
Vpp
nCLK Q0
CROSS POINTS
nQ0 tsk(o) Q1 thru Q15 tsk(o)
CROSS POINTS nQ1 thru nQ15
FIGURE 3A - OUTPUT SKEW
fin = 250MHz, Vpp = 300mV, tr = tf = 200ps
8501
www.icst.com 5
REV. A - AUGUST 23, 2000
Others parts begin by 85
85-1 85-2
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