|
Details, datasheet, quote on part number:ICS843002AGT
| |
| Part: | ICS843002AGT |
| Category: | Timing Circuits => Clock Generators |
| Description: | Femtoclocks CRYSTAL-TO-<<<>>>3.3V Lvpecl Frequency Synthesizer.<<<>>>the ICS843002 is a 2 Output Lvpecl Synthesizer<<<>>>optimized to Generate Fibre Channel Reference<<<>>>clock Frequencies And is a Member of The<<<>>>hiperclockstm Family of High Performance Clock<<<>>>solutions From Ics. Using a 26.5625MHz, 18pF<<<>>>parallel Resonant Crystal, The Following Frequencies CAN Be<<<>>>generated Based on The 2 Frequency Select Pins (F_SEL1:0):<<<>>>212.5MHz, 159.375MHz, 106.25MHz, And 53.125MHz. The<<<>>>ICS843002 Uses Ics 3rd Generation Low Phase Noise Vco<<<>>>technology And CAN Achieve 1ps or Lower Typical RMS Phase<<<>>>jitter, Easily Meeting Fibre Channel Jitter Requirements. The<<<>>>ICS843002 is Packaged in a Small 20-pin Tssop Package.<<<>>>FEATURES<<<>>> Two 3.3V Lvpecl Outputs<<<>>> Selectable Crystal Oscillator Interface<<<>>>or Lvcmos/lvttl Single-ended Input<<<>>> Supports The Following Input Frequencies:<<<>>>212.5MHz, 159.375MHz, 106.25MHz And 53.125MHz<<<>>> RMS Phase Jitter (637KHz - 10MHz): 0.724ps (typical)<<<>>> Typical Phase Noise at 212.5MHz<<<>>>Phase Noise:<<<>>>offset Noise Power<<<>>>100Hz ............... -87.7 DBc/Hz<<<>>>1KHz ..............-111.6 DBc/Hz<<<>>>10KHz ..............-124.3 DBc/Hz<<<>>>100KHz ..............-124.3 Dbc/hz |
| Company: | Integrated Circuit System |
| Datasheet: | Download ICS843002AGT datasheet File size : 277 kB |
| Request For quote: | Find where to buy ICS843002AGT
|
| |
Datasheet text preview:
Integrated Circuit Systems, Inc.
ICS843002
FEMTOCLOCKSTM CRYSTAL-TO3.3V LVPECL FREQUENCY SYNTHESIZER
FEATURES
· Two 3.3V LVPECL outputs · Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input · Supports the following input frequencies: 212.5MHz, 159.375MHz, 106.25MHz and 53.125MHz · VCO range: 560MHz - 680MHz · RMS phase jitter (637KHz - 10MHz): 0.72ps (typical) · Typical phase noise at 212.5MHz Phase noise: Offset Noise Power 100Hz ...... -87.7 dBc/Hz 1KHz ..... -111.6 dBc/Hz 10KHz ..... -124.3 dBc/Hz 100KHz ..... -124.3 dBc/Hz · Full 3.3V supply mode · -30°C to 85°C ambient operating temperature
GENERAL DESCRIPTION
The ICS843002 is a 2 output LVPECL synthesizer optimized to generate Fibre Channel reference H iPer Cl ockSTM c l o c k frequencies and is a member of the HiPerClocksTM family of high performance clock solutions from ICS. Using a 26.5625MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (F_SEL[1:0]): 212.5MHz, 159.375MHz, 106.25MHz, and 53.125MHz. The ICS843002 uses ICS' 3rd generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Fibre Channel jitter requirements. The ICS843002 is packaged in a small 20-pin TSSOP package.
ICS
FREQUENCY SELECT FUNCTION TABLE
Inputs M Divider N Divider Value Value 24 3 24 24 24 4 6 12 M/N Ratio Value 8 6 4 2 Output Frequency Range (26.5625MHz Ref.) 212.5 159.375 106.25 53.125
PIN ASSIGNMENT
nc VC C O Q0 nQ0 MR nPLL_SEL nc VCCA F_SEL0 VCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VC C O Q1 nQ1 VEE VCC n X TA L _ S E L TEST_CLK XTAL_IN XTAL_OUT F_SEL1
F_SEL1 F_SEL0 0 0 1 1 0 1 0 1
ICS843002
BLOCK DIAGRAM
F_SEL[1:0] Pulldown n P L L _ S E L Pulldown
2
20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm package body G Package Top View
Q0
F_SEL[1:0]
TEST_CLK
Pulldown 26.5625MHz
nQ0
00 1 1 01 10 11 0
÷3 ÷4 ÷6 ÷12
Q1 nQ1
XTAL_IN
OSC
XTAL_OUT n X TA L _ S E L Pulldown
0
Phase Detector
VCO 637.5MHz
(w/26.5625MHz Reference)
M = 24 (fixed)
M R Pulldown
843002AG
www.icst.com/products/hiperclocks.html
1
REV. A MAY 26, 2004
Integrated Circuit Systems, Inc.
ICS843002
FEMTOCLOCKSTM CRYSTAL-TO3.3V LVPECL FREQUENCY SYNTHESIZER
Type Description No connect. Output supply pins. Differential output pair. LVPECL interface levels. Active HIGH Master Reset. When logic HIGH, the internal dividers are reset causing the true outputs Qx to go low and the inver ted outputs nQx Pulldown to go high. When logic LOW, the internal dividers and the outputs are enabled. LVCMOS/LVTTL interface levels. Selects between the PLL and TEST_CLK as input to the dividers. When Pulldown LOW, selects PLL (PLL Enable). When HIGH, deselects the reference clock (PLL Bypass). LVCMOS/LVTTL interface levels. Analog supply pin. Pulldown Frequency select pins. LVCMOS/LVTTL interface levels. Core supply pin. Parallel resonant cr ystal interface. XTAL_OUT is the output, XTAL_IN is the input. Pulldown LVCMOS/LVTTL clock input. Selects between cr ystal or TEST_CLK inputs as the the PLL Reference Pulldown source. Selects XTAL inputs when LOW. Selects TEST_CLK when HIGH. LVCMOS/LVTTL interface levels. Negative supply pins. Differential output pair. LVPECL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1, 7 2, 20 3, 4 5 Name nc VCCO Q0, nQ0 MR Unused Power Ouput Input
6 8 9, 11 10, 16 12, 13 14 15 17 18, 19
nPLL_SEL VCCA F_SEL0, F_SEL1 VCC XTAL_OUT, XTAL_IN TEST_CLK nXTAL_SEL VEE nQ1, Q1
Input Power Input Power Input Input Input Power Output
NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLDOWN Parameter Input Capacitance Input Pulldown Resistor Test Conditions Minimum Typical 4 51 Maximum Units pF K
843002AG
www.icst.com/products/hiperclocks.html
2
REV. A MAY 26, 2004
Integrated Circuit Systems, Inc.
ICS843002
FEMTOCLOCKSTM CRYSTAL-TO3.3V LVPECL FREQUENCY SYNTHESIZER
4.6V -0.5V to VCC + 0.5V 50mA 100mA 73.2°C/W (0 lfpm) -65°C to 150°C N OT E : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC Inputs, VI Outputs, IO Continuous Current Surge Current Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = VCCA = VCCO = 3.3V±10%, TA = -30°C TO 85°C
Symbol VCC VCCA VCCO I EE ICC ICCA ICCO Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Core Supply Current Analog Supply Current Output Supply Current Test Conditions Minimum 2.97 2.97 2.97 Typical 3.3 3.3 3.3 Maximum 3.63 3.63 3.63 135 100 15 31 Units V V V mA mA mA mA
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = VCCA = VCCO = 3.3V±10%, TA = -30°C TO 85°C
Symbol VIH VIL Parameter Input High Voltage nPLL_SEL, nXTAL_SEL, Input F_SEL0, F_SEL1, MR Low Voltage TEST_CLK TEST_CLK, MR, Input F_SEL0, F_SEL1, High Current nPLL_SEL, nXTAL_SEL, TEST_CLK, MR, Input F_SEL0, F_SEL1, Low Current nPLL_SEL, nXTAL_SEL, Test Conditions Minimum Typical 2 -0.3 -0.3 VCC = VIN = 3.63V Maximum VCC + 0.3 0.8 1.0 150 Units V V V µA
IIH
IIL
VCC = 3.63V, VIN = 0V
-150
µA
TABLE 3C. LVPECL DC CHARACTERISTICS, VCC = VCCA = VCCO = 3.3V±10%, TA = -30°C TO 85°C
Symbol VOH VOL VSWING Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Peak-to-Peak Output Voltage Swing Test Conditions Minimum VCCO - 1.4 VCCO - 2.0 0.6 Typical Maximum VCCO - 0.9 VCCO - 1.7 1.0 Units V V V
NOTE 1: Outputs terminated with 50 to VCCO - 2V.
843002AG
www.icst.com/products/hiperclocks.html
3
REV. A MAY 26, 2004
|
|