|
Details, datasheet, quote on part number:ICS853210
| |
Datasheet text preview:
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
FEATURES
· 2 differential 2.5V/3.3V LVPECL / ECL bank outputs · 2 differential clock input pairs · PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL · Maximum output frequency: >3GHz · Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nPCLKx input · Output skew: 20ps (typical) · Part-to-part skew: 85ps (typical) · Propagation delay: TBD · LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V · ECL mode operating voltage supply range: VCC = 0V, VEE = -2.375V to -3.8V · -40°C to 85°C ambient operating temperature · Pin compatible with MC100EP210 and MC100LVEP210
GENERAL DESCRIPTION
T h e ICS853210 is a low skew, high perform a n c e dual 1-to- 5 Differential-to-2.5V/3.3V H iPerC lockSTM LVP E C L / E C L Fanout Buffer and a member of the HiPerClockSTM family of High Performance C l o c k Solutions from ICS. The ICS853210 i s characterized to operate from either a 2.5V or a 3.3V p o w e r supply. Guaranteed output and part-to-part skew c h a r a c t e r i s t i c s make the ICS853210 ideal for those clock d i s t r i b u t i o n applications demanding well defined perform a n c e and repeatability.
,&6
BLOCK DIAGRAM
PCLKA nPCLKA QA0 nQA0 QA1 nQA1 QA2 nQA2 QA3 nQA3 QA4 nQA4
PIN ASSIGNMENT
nQA3 nQA4 nQB0 nQB1 QA3 QA4 QB0 QB1
24 23 22 21 20 19 18 17 VCCO nQA2 QA2 nQA1 QA1 nQA0 QA0 25 26 27 28 29 30 31 32 1
VCC
16 15 14
VCCO QB2 nQB2 QB3 nQB3 QB4 nQB4 VCCO
ICS853210
13 12 11 10 9
PCLKA
PCLKB
VBB
QB2 nQB2 VBB QB3 nQB3 QB4 nQB4
32-Lead LQFP 7mm x 7mm x 1.4mm package body Y Package Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
853210BY
www.icst.com/products/hiperclocks.html
1
nPCLKA
nPCLKB
VEE
REV. A JANUARY 30, 2003
nc
PCLKB nPCLKB
QB0 nQB0 QB1 nQB1
VCCO
2
3
4
5
6
7
8
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
Type Power Unused Input Input Output Input Input Power Power Output Output Output Output Output Output Output Output Output Output Description Core supply pin. No connect. Pulldown Non-inver ting differential clock input. Clock input. VCC/2 default when left floating. Bias voltage. Pulldown Non-inver ting differential clock input. Clock input. VCC/2 default when left floating. Negative supply pin. Output supply pins. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1 2 3 4 5 6 7 8 9, 25, 32 10, 11 12, 13 14, 15 17, 18 19, 20 21, 22 23, 24 26, 27 28, 29 30, 31 Name VCC nc PCLKA nPCLKA VBB PCLKB nPCLKB VEE VCCO nQB4, QB4 nQB3, QB3 nQB2, QB2 nQB1, QB1 nQB0, QB0 nQA4, QA4 nQA3, QA3 nQA2, QA2 nQA1, QA1 nQA0, QA0
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor 37.5 75 Test Conditions Minimum Typical Maximum 4 Units pF K K
TABLE 3. CLOCK INPUT FUNCTION TABLE
Inputs PCLKA or PCLKB 0 1 0 1 Biased; NOTE 1 Biased; NOTE 1 nPCLKA or nPCLKB 1 0 Biased; NOTE 1 Biased; NOTE 1 0 1 Outputs QA0:QA4, nQA0:nQA4, QB0:QB4 nQB0:nQB4 LOW HIGH HIGH LOW HIGH HIGH LOW LOW HIGH LOW LOW HIGH Input to Output Mode Differential to Differential Differential to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Polarity Non Inver ting Non Inver ting Non Inver ting Non Inver ting Inver ting Inver ting
NOTE 1: Please refer to the Application Information, "Wiring the Differential Input to Accept Single Ended Levels".
853210BY
www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 30, 2003
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS853210
LOW SKEW, DUAL, 1-TO-5 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
4.6V -4.6V -0.5V to VCC + 0.5 V 0.5V to VEE - 0.5V ± 0.5mA -65°C to 150°C 47.9°C/W (0 lfpm) 12°C/W to 17°C/W 265°C NOTE: S t r e s s e s beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC Negative Supply Voltage, VEE Inputs, VI Outputs, VO VBB Sink/Source, IBB Storage Temperature, TSTG Package Thermal Impedance, JA
(Junction-to-Ambient)
Operating Temperature Range, TA -40°C to +85°C
Package Thermal Impedance, JC
(Junction-to-Case)
Wave Solder, TSOL
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V; VEE = 0V
Symbol VCC IEE Parameter Positive Supply Voltage Power Supply Current Test Conditions Minimum 2.375 Typical 3.3 TBD Maximum 3.8 Units V mA
TABLE 4B. LVPECL DC CHARACTERISTICS, VCC = 3.3V; VEE = 0V
Symbol VOH VOL VSWING VBB VPP VCMR IIH IIL Parameter Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 Peak-to-Peak Output Voltage Swing Output Voltage Reference; NOTE 2 Peak-to-Peak Input Voltage Input High Voltage Common Mode Range; NOTE 3, 4 PCLKA, PCLKB Input High Current nPCLKA, nPCLKB Input Low Current 150 1.2 -40°C Min Typ Max Min 25°C Typ 2280 1480 TBD TBD TBD 3.3 150 Max Min 85°C Typ Max Units mV mV mV mV mV V µA µA
PCLKA, PCLKB -10 nPCLKA, nPCLKB -150 Input and output parameters var y 1:1 with VCC. VEE can var y +0.925V to -0.5V. NOTE 1: Outputs terminated with 50 to VCCO - 2V. NOTE 2: Single-ended input operation is limited. VCC 3V in LVPECL mode. NOTE 3: Common mode voltage is defined as VIH. NOTE 4: For single-ended applications, the maximum input voltage for PCLKA, nPCLKA and PCLKB, nPCLKB is VCC + 0.3V.
853210BY
www.icst.com/products/hiperclocks.html
3
REV. A JANUARY 30, 2003
|
|
