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Details, datasheet, quote on part number:ICS85356AGI
 
 
Part:ICS85356AGI
Category:Timing Circuits => Muxes
Description:Dual2:1 Differential-to- Lvpecl Mux. Functionally Compatible w/ MC100LVEL56.Industrial Temperature
Company:Integrated Circuit System
Datasheet:Download ICS85356AGI datasheet   File size : 137 kB
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Datasheet text preview:
Integrated Circuit Systems, Inc.
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL / ECL CLOCK MULTIPLEXER
FEATURES
· High speed differential multiplexer. The device can be configured as a 2:1 multiplexer · Dual 3.3V LVPECL outputs · Selectable differential CLKxx, nCLKxx inputs · CLKxx, nCLKxx pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL · Maximum output frequency: 900MHz (typical) · Translates any single ended input signal to 3.3V LVPECL levels with resistor bias on nCLKxx input · Output skew: 75ps (typical) · Propagation delay: 1.15ns (typical) · LVPECL mode operating voltage supply range: VCC = 3V to 3.8V, VEE = 0V · ECL mode operating voltage supply range: VCC = 0V, VEE = -3V to -3.8V · -40°C to 85°C ambient operating temperature · Compatible with MC100LVEL56
GENERAL DESCRIPTION
The ICS85356I is a dual 2:1 Differential-to-LVPECL Multiplexer and is a member of the HiPerClockSTM H iPerC lockSTM family of High Performance Clock Solutions from ICS. The device has both common select and individual select inputs. When COM_SEL is logic High, the CLKxx input pairs will be passed to the output. When COM_SEL is logic Low, the output is determined by the setting of the SEL0 pin for channel 0 and the SEL1 pin for Channel 1.
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The differential input has a common mode range that can accept most differential input types such as LVPECL, LVDS, LVHSTL, SSTL, and HCSL. The ICS85356I can therefore be used as a differential translator to translate almost any differential input type to LVPECL. It can also be used in ECL mode by setting VCC=0V and VEE to -3.0V to - 3.8V. The ICS85356I adds negligible jitter to the input clock and can operate at high frequencies in excess of 900MHz thus making it ideal for use in demanding applications such as SONET, Fibre Channel, 1 Gigabit/10 Gigabit Ethernet.
BLOCK DIAGRAM
CLK0A nCLK0A CLK0B nCLK0B SEL0 COM_SEL SEL1 0 1 Q0 nQ0
PIN ASSIGNMENT
CLK0A nCLK0A nc CLK0B nCLK0B CLK1A nCLK1A nc CLK1B nCLK1B 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC Q0 nQ0 SEL0 COM_SEL SEL1 VCC Q1 nQ1 VEE CLK0A nCLK0A nc CLK0B nCLK0B CLK1A nCLK1A nc CLK1B nCLK1B 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC Q0 nQ0 SEL0 COM_SEL SEL1 VCC Q1 nQ1 VEE
ICS85356I
CLK1A nCLK1A CLK1B nCLK1B 0 1 Q1 nQ1
ICS85356I
20-Lead TSSOP 6.5mm x 4.4mm x 0.92mm G Package Top View
20-Lead SOIC 7.5mm x 12.8mm x 2.3mm M Package Top View
85356AMI
www.icst.com/products/hiperclocks.html
1
REV. A SEPTEMBER 30, 2002
Integrated Circuit Systems, Inc.
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL / ECL CLOCK MULTIPLEXER
Type Power Input Input Unused Input Input Input Input Input Input Power Output Input Input Input Output Pullup Pulldown Pullup Pulldown Pullup Pulldown Pullup Pulldown Pullup Pulldown Pullup Description Core supply pin. Non-inver ting differential clock input. Inver ting differential clock input. No connect. Non-inver ting differential clock input. Inver ting differential clock input. Non-inver ting differential clock input. Inver ting differential clock input. Non-inver ting differential clock input. Inver ting differential clock input. Negative supply pins. Differential output pairs. LVPECL interface levels. Clock select input. LVCMOS / LVTTL interface levels. Common select input. LVCMOS / LVTTL interface levels. Clock select input. LVCMOS / LVTTL interface levels. Differential output pairs. LVPECL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 14, 20 1 2 3, 8 4 5 6 7 9 10 11 12, 13 15 16 17 18, 19 Name VCC CLK0A nCLK0A nc CLK0B nCLK0B CLK1A nCLK1A CLK1B nCLK1B VEE nQ1, Q1 SEL1 COM_SEL SEL0 nQ0, Q0
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor 51 51 Test Conditions Minimum Typical Maximum 4 Units pF K K
TABLE 3. CONTROL INPUT FUNCTION TABLE
Inputs COM_SEL 0 0 0 0 1 SEL1 0 0 1 1 X SEL0 0 1 0 1 X Q0 CLK0A CLK0B CLK0A CLK0B CLK0B nQ0 nCLK0A nCLK0B nCLK0A nCLK0B nCLK0B Outputs Q1 CLK1A CLK1A CLK1B CLK1B CLK1B nQ1 nCLK1A nCLK1A nCLK1B nCLK1B nCLK1B
85356AMI
www.icst.com/products/hiperclocks.html
2
REV. A SEPTEMBER 30, 2002
Integrated Circuit Systems, Inc.
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V DUAL LVPECL / ECL CLOCK MULTIPLEXER
4.6V -0.5V to VCC + 0.5V -0.5V to VCC + 0.5V 46.2°C/W (0 lfpm) -65°C to 150°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC Inputs, V I Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V±0.3V, TA = -40°C TO 85°C
Symbol VCC IEE Parameter Positive Supply Voltage Power Supply Current Test Conditions Minimum 3.0 Typical 3.3 Maximum 3.6 40 Units V mA
TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VCC = 3.3V±0.3V, TA = -40°C TO 85°C
Symbol VIH VIL IIH IIL Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current SEL0, SEL1, COM_SEL SEL0, SEL1, COM_SEL SEL0, SEL1 COM_SEL SEL0, SEL1 COM_SEL VCC = VIN = 3.6V VCC = VIN = 3.6V VCC = 3.6V, VIN = 0V VCC = 3.6V, VIN = 0V -150 -5 Test Conditions Minimum 2 -0.3 Typical Maximum VCC + 0.3 0.8 5 150 Units V V µA µA µA µA
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, VCC = 3.3V±0.3V, TA = -40°C TO 85°C
Symbol Parameter CLK0A, CLK0B, CLK1A, CLK1B Test Conditions VCC = VIN = 3.6V VCC = VIN = 3.6V VCC = 3.6V, VIN = 0V VCC = 3.6V, VIN = 0V -5 -150 0.15 VEE + 0.5 1.0 VCC - 0.85 Minimum Typical Maximum 150 5 Units µA µA µA µA V V
IIH
Input High Current
IIL VPP VCMR
nCLK0A, nCLK0B, nCLK1A, nCLK1B CLK0A, CLK0B, CLK1A, CLK1B Input Low Current nCLK0A, nCLK0B, nCLK1A, nCLK1B Peak-to-Peak Voltage Common Mode Input Voltage; NOTE 1, 2
NOTE 1: Common mode input voltage is defined as VIH. NOTE 2: For single ended applications, the maximum input voltage for CLKx, nCLKx is VCC + 0.3V.
85356AMI
www.icst.com/products/hiperclocks.html
3
REV. A SEPTEMBER 30, 2002