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Details, datasheet, quote on part number:ICS9169CM-232
 
 
Part:ICS9169CM-232
Description:Frequency Generator For Pentium Based System
Company:Integrated Circuit System
Datasheet:Download ICS9169CM-232 datasheet   File size : 176 kB
Request For quote:  Find where to buy ICS9169CM-232
 



Datasheet text preview:
Integrated Circuit Systems, Inc.
ICS9169C-22
Preliminary Product Preview
Frequency Generator for Pentium Based Systems
General Description
The ICS9169C-22 is a low-cost frequency generator designed s p e c i f i c a l l y for Pentium-based chip set systems. The integrated buffer minimizes skew and provides all the clocks required. A 14.318 MHz XTAL oscillator provides the reference clock to generate standard Pentium frequencies. The CPU clock makes gradual frequency transitions without violating the PLL timing of internal microprocessor clock multipliers. Either synchronous (CPU/2) or asynchronous (32 MHz) PCI bus operation can be selected.
Features
· · · · · · · · · Seven selectable CPU clocks operate up to 83.3MHz Maximum CPU jitter of ±200ps Six BUS clocks support sync or async bus operation 500ps skew window for all synchronous clock edges CPU clocks to BUS clocks in sync mode skew 1-4 ns (CPU early) Integrated buffer outputs drive up to 30pF loads 3.0V - 3.7Vsupply range 32-pin SOIC package 48 MHz clock for USB support and 24 MHz clock for FD
Block Diagram
Pin Configuration
32-Pin SOIC
Functionality
3.3V±10%, 0-70°C Crystal (X1, X2) = 14.31818 MHz
B S E L FS2 0 0 0 0 0 0 0 0 1 CPU BUS (1:7) (1:6) 4 8 M H z 2 4 M H z MHz MHz 0 0 0 55 27.5 48 24 0 0 1 80 40 48 24 0 1 0 100 50 48 24 0 1 1 75 37.5 48 24 1 0 0 50 25 48 24 1 0 1 66.6 33.3 48 24 1 1 0 60 30.0 48 24 1 1 1 Tr i s t a t e Tr i s t a t e Tr i s t a t e Tr i s t a t e s e l e c t s e l e c t s e l e c t a s a b ove 3 2 . 0 48 24 FS1 FS0 REF (1:3) 14.318 14.318 14.318 14.318 14.318 14.318 14.318 Tr i s t a t e 14.318
Pentium is a trademark on Intel Corporation.
9169-22 Rev C 03/17/00
P R O D U C T PREVIEW documents contain information on new p r o d u c t s in the sampling or preproduction phase of development. C h a r a c t e r i s t i c data and other specifications are subject to change w i t h o u t notice.
ICS169C-22
Preliminary Product Preview
FS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
FS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
FS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
FS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
2XCPUCLK 4X Input 2X Input 3X Input 8X Input .5X Input .75X Input 5X Input 7X Input 64MHz 2X Input 3X Input 8X Input* .5X Input .25X Input 5X Input 7X Input
CPUCLK 40MHz 33.33 MHz 25 MHz 20 MHz 50 MHz* 16.7 MHz
FIN < 20 MHz
32 MHz Input 1.5X Input 4X Input* .25X Input .125X Input
FIN
³
2.0 MHz
Pin Descriptions
PIN NUMBER 1,7,23,29 2 3 4,10,20,26 5,6,8,9,11,12,13 14,15,16 17 18,19,21,22,24,25 27 28 30,31,32 PIN NAME VDD X1 X2 GND CPU(1:7) FS(0:2) BSEL BUS(0:5) (1:6) 48MHz 24MHz REF(0:2) (1:3) TYPE PWR IN OUT PWR OUT IN IN OUT OUT OUT OUT DESCRIPTION Power for logic, PLL and output buffers. XTAL or external reference frequency input. This input includes XTAL load capacitance and feedback bias for a 12-16 MHz crystal, nominally 14.31818 Mhz. XTAL output which includes XTAL load capacitance. Ground for logic, PLL and output buffers. Processor clock outputs which are a multiple of the input reference frequency as shown in the table above. Frequency multiplier select pins. See table above. These inputs have internal pull up devices. Selector for synchronous or asynchronous bus operation. Bus clock outputs. Fixed 48 MHz clock (with 14.318 MHz input). Fixed 24 MHz clock (with 14.318 MHz input). REF is a buffered copy of the crystal oscillator or reference input clock, nominally 14.31818 MHz.
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ICS169C-22
Preliminary Product Preview
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND ­0.5 V to VDD +0.5 V Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . ­65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Electrical Characteristics at 3.3V
VDD = 3.0 ­ 3.7 V, TA = 0 ­ 70° C unless otherwise stated
DC Characteristics PARAMETER Input Low Voltage Input High Voltage Input Low Current Input High Current Output Low Current1 Output High Current1 Output Low Current1 Output High Current1 Output Low Voltage1 Output High Voltage1 Output Low Voltage1 Output High Voltage1 Supply Current SYMBOL VIL VIH IIL IIH IOL IOH IOL IOH VOL VOH VOL VOH IDD VIN=0V VIN=VDD VOL=0.8V; for CPU & BUS VOL=2.0V; for CPU & BUS VOL=0.8V; for fixed CLKs VOL=2.0V; for fixed CLKs IOL=15mA; for CPU & BUS IOH=-30mA; for CPU & BUS IOL=12.5mA; for fixed CLKs IOH=-20mA; for fixed CLKs @66.6 MHz; all outputs unloaded TEST CONDITIONS MIN 0.7VDD -28.0 -5.0 30.0 25.0 2.4 2.4 TYP -10.5 47.0 -66.0 38.0 -47.0 0.3 2.8 0.3 2.8 55 MAX 0.2VDD 5.0 -42.0 -30.0 0.4 0.4 110 UNITS V V µA µA mA mA mA mA V V V V mA
Note 1: Parameter is guaranteed by design and characterization. Not 100% tested in production.
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