|
|
Part: MK3733STR
Category:
Description:
Company: Integrated Circuit System
Datasheet: Download MK3733STR datasheet File size : 108 kB
Request For quote: Find where to buy MK3733STR
Datasheet text preview:
P R E L I M I N A RY I N F O R M AT I O N
MK3733
DSL AFE VCXO WITH 0-1V INPUT CONTROL RANGE
DESCRIPTION
The MK3733 is designed to be used with DSL Analog Front End (AFE) chips. Unlike other similar ICS devices, it has a 0-1V input range on the VCXO frequency control input. When a 0-3.3V input range is required, please refer to the MK3727B or MK3727C. Using ICS's integrated and patented VCXO and PLL technology, the MK3733 is able to generate an ADSL VCXO clock frequency of 35.328MHz using an external, inexpensive 17.664MHz pullable crystal. The MK3733 is controlled by the DSL AFE to generate a synchronous symbol sample clock. Some AFE's generate an output current as the VCXO control signal, which then normally calls for the use of an external amplifier to generate the 0-3.3V control voltage required by a standard VCXO module. By directly accepting the load voltage from the control current termination network (R1 and R2 in Block Diagram), the MK3733 effectively replaces both the amplifier and VCXO module. The provides improved system integration and cost savings.
FEATURES
· Replaces the VCXO and op-amp in
current-controlled DSL symbol clock recovery implementations.
· Increases system integration while lowering cost · Phase noise performance equal or better than
standard VCXO modules
· · · ·
Requires inexpensive external crystal Packaged in 8 pin SOIC Low power CMOS technology 3.3V operating voltage
BLOCK DIAGRAM
P u lla b le X T A L ( 1 7 .6 6 4 M H z )
VDD
2
VDD
R1 392k V IN R2 8 .2 5 k C1 100nF X1 X2 VDD
VCXO C o n tr o l C u rre n t
VCXO
M K 3733S
PLL
3 5 .3 2 8 M H z
GND
2
MDS 3733 A
1
q
Revision 032601 tel ( 4 0 8 ) 295- 9 8 0 0
q
I n t e g r a t e d Cir c u i t S y s t e m s q 525 Race Str e e t , Sa n Jose, CA 95126
www. i c s t . c o m
P R E L I M I N A RY I N FO R M ATI O N
MK3733
DSL AFE VCXO WITH 0-1V INPUT CONTROL RANGE
PIN ASSIGNMENT
X1 VDD VIN GND 1 2 3 4 8 7 6 5 X2 VDD 35.328M GND
8 Pin SOIC
PIN DESCRIPTIONS
Pin Num ber
1 2 3 4 5 6 7 8
Pin Name
X1 VDD VIN GND GND 35.328M VDD X2
Pin Type
Input Power Input Power Power Output Power Output
Pin Description
Crystal connection. Connect to a pullable 17.664 MHz crystal. Power Supply. Connect to +3.3V. VCXO Control Voltage input. Connect this pin as shown in the block diagram. Ground Ground 35.328 MHz Clock Output Power Supply. Connect to +3.3V. Crystal connection. Connect to a pullable 17.664 MHz crystal.
MDS 3733 A
2
q
Revision 032601 t e l ( 4 0 8 ) 295-9 8 0 0
q
I n t e g r a t e d C i r c u i t Syst e m s q 525 R a c e S t r e e t , San Jo s e , C A 9 5 1 2 6
w w w. i c s t . c o m
P R E L I M I N A RY I N FO R M ATI O N
MK3733
DSL AFE VCXO WITH 0-1V INPUT CONTROL RANGE
EXTERNAL COMPONENTS
A minimum number of external components are required for proper operation. Decoupling capacitors of 0.01 µF should be connected between VDD and GND pins 2 and 4, and pins 5 and 7, as close to the MK3733 as possible. The decoupling capacitors should be placed on the component side of the board, and no via's should be used between the decoupling capacitor and the device. A series termination resistor of 33 may be used at the clock output. The reference crystal should be a fundamental mode, parallel resonant, pullable, AT cut. The crystal should have a total error budget of 70 ppm accounting for initial accuracy, temperature and aging. Maximum C0/C1 should be 250, and nominal load capacitance should be 14pF. Consult ICS/MicroClock for recommended suppliers. IMPORTANT - Consult application note MAN05 for layout guidelines (note, however that MK3733 VIN range is 0 to 1V)
ABSOLUTE MAXIMUM RATINGS
Stresses above the ratings listed below can cause permanent damage to the MK3733. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5V to VDD+0.5V 0 to +70°C -65 to +150°C 175°C 260°C
MDS 3733 A
3
q
Revision 032601 t e l ( 4 0 8 ) 295-9 8 0 0
q
I n t e g r a t e d C i r c u i t Syst e m s q 525 R a c e S t r e e t , San Jo s e , C A 9 5 1 2 6
w w w. i c s t . c o m
Others parts begin by mk
|
|
|
