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Details, datasheet, quote on part number:692A
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| Part: | 692A |
| Category: | Power Management => Supervisory Circuits => Microprocessor Supervisors => Watchdog |
| Description: | Power Supply Supervisor With Battery Backup Switch |
| Company: | IMP, Inc. |
| Datasheet: | Download 692A datasheet File size : 231 kB |
| Request For quote: | Find where to buy 692A
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Datasheet text preview:
IMP690A , 692A , 802L/M, 805L
POWER MANAGEMENT
µP Power Supply Supervisor with Battery Backup Switch
The IMP690A/IMP692A/IMP802L/IMP802M/IMP805L simplify power supply monitoring and control in microprocessor systems. Each circuit implements four functions: Reset control, watchdog monitoring, batterybackup switching and power-failure monitoring. In addition to microprocessor reset under powerup and power-down conditions, these devices provide battery-backup switching to maintain control in powerloss and brown-out situations. Additional monitoring capabilities can provide an early warning of unregulated power-supply loss before the voltage regulator drops out. The important features of these four functions are: a) 1.6 second watchdog timer to keep microprocessor responsive b) c) 4.40V or 4.65V VCC threshold for microprocessor reset at power-up and power-down SPDT (single-pole, double-throw) PMOS switch connects backup power to RAM if VCC fails
Key Features
x Design improvement over Maxim MAX690A/692A/802L/802M/805L -- 70% lower current than Maxim: 100µA maximum -- RESET Operation to 1.1V x Two precision supply-voltage monitor options -- 4.65V (IMP690A/802L/805L) -- 4.40V (IMP692A/802M) x Batter y-backup power switch on-chip x Watchdog timer: 1.6 second timeout x Power failure/low battery detection x Shor t-circuit protection and thermal limiting x Small 8-pin SO package x No external components x Specified over full temperature range
d) 1.25V threshold detector for power loss or general purpose voltage monitoring While these features are pincompatible with the industry standard powersupply supervisors offered by Maxim, the IMP devices are superior replacements and can reduce power requirements by 70 percent when compared to Maxim MAX690/MAX692A/MAX802L/MAX802M/ MAX805L devices. Short-circuit and thermal protection have also been added. The IMP690A/IMP802L/IMP805L generate a reset pulse when the supply voltage drops below 4.65V, and the IMP692A/IMP802M generate a reset below 4.40V. The IMP802L/IMP802M have powerfail accuracy to ±2%. The IMP805L is the same as the IMP690A except that RESET is provided instead ofET. RES
Applications
x Embedded control systems x Batter yoperated systems x Intelligent instruments x Wireless communication systems x PDAs and handheld equipment x µP/µC power supply monitoring
Block Diagrams
VBATT VCC
+
Typical Application
1 7 VOUT RESET (RESET) Unregulated DC 0.1µF PFI R2 Regulated +5V VCC RESET PFO WDI VOUT NMI I/O LINE GND BUS CMOS VCC RAM GND
690A_01.eps
8 2
Battery-Switchover Circuit Reset Generator
+
VCC RESET
R1
1.25V 3.5V 6 WDI
+ + + +
Watchdog Timer
+
3.6V Lithium Battery
VBATT GND
0.8V 4 PFI
1.25V
+ +
IMP690A
5 PFO
IMP690A, IMP692A, IMP802L, IMP802M, IMP805L ( ) IMP805L 3 GND
690A_03.eps
IMP, Inc.
San Jose, CA
408-432-9100/www.impweb.com
I M P 6 9 0 A , 692A , 802L, 802M, 805L
Pin Configuration
Plastic/CerDip/SO
VOUT VCC GND PFI 1 2 3 4 IMP690A IMP692A IMP802L IMP802M IMP805L 8 7 6 5 VBATT RESET (RESET) WDI PFO
( ) IMP805L
690A_02.eps
Ordering Information
Part Number IMP690A
IMP690ACPA IMP690ACSA IMP690AC/D IMP690AEPA IMP690AESA IMP690AMJA 4.5 to 4.75 4.5 to 4.75 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.25 to 4.50 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75 4.5 to 4.75
Reset Threshold (V)
4.5 to 4.75 4.5 to 4.75 4.5 to 4.75
Temperature Range
0°C to +70°C 0°C to +70°C 25°C 40°C to +85°C 40°C to +85°C Contact Factory 0°C to +70°C 0°C to +70°C 25°C 40°C to +85°C 40°C to +85°C Contact Factory 0°C to +70°C 0°C to +70°C 40°C to +85°C 40°C to +85°C 0°C to +70°C 0°C to +70°C 40°C to +85°C 40°C to +85°C 0°C to +70°C 0°C to +70°C 25°C 40°C to +85°C 40°C to +85°C Contact Factory
Pins-Package
8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP 8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO DICE 8-Plastic DIP 8-SO 8-CerDIP
IMP692A
IMP692ACPA IMP692ACSA IMP692AC/D IMP692AEPA IMP692AESA IMP692AMJA
IMP802L
IMP802LCPA IMP802LCSA IMP802LEPA IMP802LESA
IMP802M
IMP802MCPA IMP802MCSA IMP802MEPA IMP802MESA
IMP805L
IMP805LCPA IMP805LCSA IMP805LC/D IMP805LEPA IMP805LESA IMP805LMJA
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I M P 6 9 0 A , 692A , 802L, 802M, 805L IMP690A
Pin Description
Pin Number IMP690A/IMP692A IMP802L/IMP802M
1
IMP805L
1
Name
VOUT
Function
Voltage supply for RAM. When VCC is above the reset threshold, VOUT connects to VCC through a P-channel MOS device. If VCC falls below the reset threshold, this output will be connected to the backup supply at VBATT (or VCC, whichever is higher) through the MOS switch to provide continuous power to the CMOS RAM. +5V power supply input Ground Power failure monitor input. PFI is connected to the internal power fail comparator which is referenced to 1.25V. The power fail output (PFO) is active LOW but remains HIGH if PFI is above 1.25V. If this feature is unused, the PFI pin should be connected to GND or VOUT. Power-fail output. is active LOW whenever the PFI pin is less than PFO 1.25V. Watchdog input. The WDI input monitors microprocessor activity. An internal timer is reset with each transition of the WDI input. If WDI is held HIGH or LOW for longer than the watchdog timeout period, typically 1.6 seconds, RESET (orRS T) is asserted for the reset pulse width time, E E tRS, of 140ms, minimum. Active-LOW reset output. When triggered by VCC falling below the reset threshold or by watchdog timer timeout, RESET (orRS T) pulses low E E for the reset pulse width, t RS, typically 200ms. It will remain low if VCC is below the reset threshold (4.65V in the IMP690A/IMP802L and 4.4V in the IMP692A/IMP802L) and remains low for 200ms after VCC rise above the reset threshold. Active-HIGH reset output. The inverse of T. RESE Auxiliary power or backup-battery input. VBATT should be connected to GND if the function is not used. This input has about 40mV of hysteresis to prevent rapid toggling between VCC and VBATT.
2 3 4
2 3 4
VCC GND PFI
5 6
5 6
PFO WDI
7
RET ES
8
7 8
RESET VBATT
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V to 6.0V VBATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V to 6.0V All Other Inputs* . . . . . . . . . . . . . . . . . . . 0.3V to (VCC + 0.3V) Input Current at VCC . . . . . . . . . . . . . . . . . . 200mA Input Current at VBATT . . . . . . . . . . . . . . . . . 50mA Input Current at GND . . . . . . . . . . . . . . . . . 20mA Output Current: VOUT . . . . . . . . . . . . . . . Short circuit protected All Other Inputs . . . . . . . . . . . . . . . . . . . 20mA Rate of Rise: VBATT and VCC . . . . . . . . . . 100V/µs Continuous Power Dissipation Plastic DIP (derate 9mW/°C above 70°C) . . . 800mW SO (derate 5.9mW/°C above 70°C) . . . . . . . . 500mW CerDIP (derate 8mW/°C above 70°C) . . . . . . 650mW Operating Temperature Range (C Devices) . . . . 0°C to 70°C Operating Temperature Range (E Devices) . . . . 40°C to 85°C Storage Temperature Range . . . . . . . . . . . . . . . . . 65°C to 160°C Lead Temperature Soldering, (10 sec) . . . . . . . . 300°C * The input voltage limits on PFI and WDI may be exceeded if the current is limited to less than 10mA These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.
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I M P 6 9 0 A , 692A , 802L, 802M, 805L
Electrical Characteristics
Unless otherwise noted VCC = 4.75V to 5.5V for the IMP690A/IMP802L/IMP805L and VCC = 4.5V to 5.5V for the IMP692A/IMP802M; VBATT = 2.8V; and TA = TMIN to TMAX.
Parameter
VCC, VBATT Voltage Range (Note 1) Supply Current Excluding IOUT ISUPPLY in Battery-Backup Mode (Excluding IOUT) VBATT Standby Current (Note 2) VOUT Output VOUT in Battery-Backup Mode Battery Switch Threshold, VCC to VBATT Battery Switchover Hysteresis Reset Threshold
Symbol
Conditions
IMP69_AC, IMP802_C IMP805LC IMP69_AE, IMP80_ _E IMP69_AC, IMP802_C IMP69_AE, IMP802_E, IMP805LE VCC = 0V, VBATT = 2.8V TA = 25°C TA = TMIN to TMAX 5.5V > VCC > VBATT 0.2V TA = 25°C TA = TMIN to TMAX IOUT = 5mA IOUT = 50mA IOUT = 250µA, VCC < VBATT 0.2V Power-up VCC < VRT Power-down IMP690A/802L/805L IMP692A, IMP802M IMP802L, TA = 25°C, VCC falling IMP802M, TA = 25°C, VCC falling
Min
1.1 1.1 1.1
Typ
Max Units
5.5 5.5 5.5 100 100 1.0 5.0 0.02 0.02 V
IS
35 35
µA µA µA V V mV mV V
VRT
Reset Threshold Hysteresis Reset Pulse Width Reset Output Voltage
tRS ISOURCE = 800µA ISINK = 3.2mA IMP69_AC, IMP802_C, VCC = 1.0V, ISINK = 50µA IMP69_AE, IMP802_E, VCC = 1.2V, ISINK = 100µA IMP805LC, ISOURCE = 4µA, VCC = 1.1V IMP805LE, ISOURCE = 4µA, VCC = 1.2V IMP805L, ISOURCE = 800µA IMP805L, ISINK = 3.2mA tWD tWP VIL= 0.4V, VIH = 0.8VCC WDI = VCC WDI = 0V VCC = 5V, Logic LOW VCC = 5V, Logic HIGH IMP69_A, IMP805L, VCC = 5V IMP802_C/E, VCC = 5V ISOURCE = 800µA ISINK = 3.2mA
0.1 1.0 VCC 0.025 VCC 0.010 VCC 0.25 VCC 0.10 VBATT 0.1 VBATT 0.001 20 20 40 4.50 4.65 4.25 4.40 4.55 4.30 40 140 200 VCC 1.5
4.75 4.50 4.70 4.45 280 0.4 0.3 0.3
mV ms V
0.8 0.9 VCC 1.5 1.00 50 150 3.5 1.20 1.225 25 VCC 1.5 1.60 50 50 0.4 2.25 150 0.8 1.25 1.250 0.01 1.30 1.275 25 0.4 sec ns µA V V nA V
Watchdog Timeout WDI Pulse Width WDI Input Current WDI Input Threshold (Note 3) PFI Input Threshold PFI Input Current PFO Output Voltage
Notes: 1. If VCC or VBATT is 0V, the other must be greater than 2.0V. 2. Battery charging-current is "". Battery discharge-current is "+". 3. WDI is guaranteed to be in an intermediate level state if WDI is floating and VCC is within the operating voltage range. WDI input impedance is 50k. WDI is biased to 0.3VCC.
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I M P 6 9 0 A , 692A , 802L, 802M, 805L
Application Information
Reset Output
It is important to initialize a microprocessor to a known state in response to specific events that could create code execution errors and "lock-up". The reset output of these supervisory circuits send a reset pulse to the microprocessor in response to power-up, power-down/power-loss or a watchdog time-out. The reset pulse width, t RS, is typically around 200ms and is LOW for the IMP690A, IMP692A, IMP802 and HIGH for the IMP805L. Power-up reset occurs when a rising VCC reaches the reset threshold, VRT, forcing a reset condition in which the reset output is asserted in the appropriate logic state for the duration of t RS. Figure 2 shows the reset pin timing. Power-loss or "brown-out" reset occurs when VCC dips below the reset threshold resulting in a reset assertion for the duration of tRS. The reset signal remains asserted as long as VCC is between VRT and 1.1V, the lowest VCC for which these devices can provide a guaranteed logic-low output. To ensure logic inputs connected to the IMP690A/692A/802 RESET pin are in a known state when VCC is under 1.1V, a 100k pull-down resistor at RESET is needed: the logic-high IMP805L will need a pull-up resistor to VCC. A Watchdog time-out reset occurs when a logic "1" or logic "0" is continuously applied to the WDI pin for more than 1.6 seconds. After the duration of the reset interval, the watchdog timer starts a new 1.6 second timing interval; the microprocessor must service the watchdog input by changing states or by floating the WDI pin before this interval is finished. If the WDI pin is held either HIGH or LOW, a reset pulse will be triggered every 1.8 seconds (the 1.6 second timing interval plus the reset pulse width t RS).
Microprocessor Interface.
The IMP690 has logic-LOW RESET output while the IMP805 has an inverted logic-HIGH RESET output. Microprocessors with bidirectional reset pins (69HC11 for example) can pose a problem when the supervisory circuit and the microprocessor output pins attempt to go to opposite logic states. The problem can be resolved by placing a 4.7k resistor between the RESET output and the microprocessor reset pin. This is shown in Figure 3. Since the series resistor limits drive capabilities, the reset signal to other devices should be buffered.
+ 5V VCC + 0V + 5V VOUT + 0V + 5V RESET + 0V + 5V (RESET) + 0V + 5V PFO + 0V ( ) IMP805L VBATT = PFI = 3.0V IOUT = 0mA
690A_04.eps
3.0V tRS
3.0V
Figure 2. Timing Diagram
VBATT VCC
+
8 2
Battery-Switchover Circuit Reset Generator
+
1 7
VOUT RESET (RESET)
Buffered RESET to Other System Components
1.25V 3.5V 6 WDI
+ + + +
Watchdog Timer VCC 1.25V
+ +
VCC 4.7k
0.8V 4 PFI
5 PFO
RESET IMP690A GND
RESET
IMP690A, IMP692A, IMP802L, IMP802M, IMP805L ( ) IMP805L 3 GND
690A_03.eps
GND
690A_05.eps
Figure 1. Block Diagram
Figure 3. Interfacing with bi-directional microprocessor reset inputs
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