Details, datasheet, quote on part number: HYM322120S-70
CategoryMemory => DRAM => SDR SDRAM => Modules
Description2M X 32 Bit DRAM Module
CompanyInfineon Technologies Corporation
DatasheetDownload HYM322120S-70 datasheet


Features, Applications

097 152 words by 32-bit organization (alternative 194 304 words by 16-bit) Fast access and cycle time 50 ns access time 90 ns cycle time (-50 version) 60 ns access time 110 ns cycle time (-60 version) Fast page mode capability with 35 ns cycle time (-50 version) 40 ns cycle time (-60 version) Single V 10 supply Low power dissipation max. 2200 mW active (-50 version) max. 1980 mW active (-60 version) CMOS 22 mW standby TTL 44 mW standby CAS-before-RAS refresh, RAS-only-refresh, Hidden refresh 4 decoupling capacitors mounted on substrate All inputs, outputs and clock fully TTL compatible 72 pin Single in-Line Memory Module Utilizes four × 16 -DRAMs in SOJ-42 packages 1024 refresh cycles 16 ms Optimized for use in byte-write non-parity applications Tin-Lead contact pads HYM 322000S Gold-Lead contact pads HYM 322000GS single sided module with mm (800 mil) height

The HYM a 8 MByte DRAM module organized 097 152 words a 72-pin single-in-line package comprising four HYB × 16 DRAMs in 400 mil wide SOJ-packages mounted together with four 0.2 µF ceramic decoupling capacitors a PC board. The HYM 322000S/GS-60 can also be used 194 304 words by 16-bits dynamic RAM module by means of connecting DQ0 and DQ16, DQ1 and DQ17, DQ2 and DQ18,..., DQ15 and DQ31, respectively. Each HYB 5118160BSJ is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The speed of the module can be detected by the use of four presence detect pins. The common I/O feature on the HYM 322000S/GS-50/-60/-70 dictates the use of early write cycles. Ordering Information Type HYM 322000S-50 HYM 322000S-60 HYM 322000GS-50 HYM 322000GS-60 Ordering Code - Q2059 Package L-SIM-72-10 Descriptions DRAM module (access time 50 ns) DRAM module (access time 60 ns) DRAM module (access time 50 ns) DRAM module (access time 60 ns)

Address Inputs Data Input/Output Column Address Strobe Row Address Strobe Read/Write Input Power 5 V) Ground Presence Detect Pin No Connection

Presence Detect Pins PD2 PD3 N.C. -60 N.C. N.C N.C.


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