Details, datasheet, quote on part number: HYM368020GS-60
PartHYM368020GS-60
Category
Description8M X 36bit Edo-dram Module
CompanyInfineon Technologies Corporation
DatasheetDownload HYM368020GS-60 datasheet
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Features, Applications

SIMM modules with 388 608 words by 36-bit organization for PC main memory applications Fast access and cycle time 60 ns access time 110 ns cycle time (-60 version) Fast page mode capability 40 ns cycle time (-60 version) Single V 10 supply Low power dissipation max. 7260 mW active (-60 version) max. 6600 mW active (-70 version) CMOS 132 mW standby TTL 264 mW standby CAS-before-RAS refresh RAS-only-refresh Hidden-refresh 24 decoupling capacitors mounted on substrate All inputs, outputs and clocks fully TTL compatible 72 pin Single in-Line Memory Module (L-SIM-72-14) with 31.75 mm height Utilizes sixteen 4Mx4-DRAMs and eight x 1 DRAMs in 300 mil wide SOJ packages 2048 refresh cycles 32 ms Optimized for use in byte-write parity applications Tin-Lead contact pads (S- version) Gold contact pads (GS - version)

The HYM a 32 MByte DRAM module organized 388 608 words a 72-pin single-in-line package comprising sixteen HYB 4 DRAMs and eight HYB x 1 DRAMs in 300 mil wide SOJ-packages mounted together with 0.2 F ceramic decoupling capacitors a PC board. The HYM 368020S/GS-60 can also be used 777 360 words by 18-bits dynamic RAM module by means of connecting DQ0 and DQ18, DQ1 and DQ19, DQ2 and , DQ17 and DQ35, respectively. Each HYB 5117400BJ and HYB 514100BJ is described in the data sheet and is fully electrical tested and processed according to SIEMENS standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The speed of the module can be detected by the use of four presence detect pins. The common I/O feature on the HYM 368020S/GS-60/-70 dictates the use of early write cycles. Ordering Information Type HYM 368020S-60 HYM 368020GS-60 Ordering Code Q67100-Q985 Q67100-Q2007 Package L-SIM-72-14 Description DRAM Module (access time 60 ns) DRAM Module (access time 60 ns)

VSS DQ21 9 VCC 10 N.C. A7 28 N.C. 29 VCC DQ35 38 VSS RAS1 45 N.C. WE 47 N.C. DQ31 58 VCC DQ16 65 N.C. PD3 70 N.C. 71 VSS 72

Address Inputs Data Input/Output Column Address Strobe Row Address Strobe Read/Write Input Power 5 V) Ground Presence Detect Pin No Connection


 

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