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Part: SPI07N60C3
Category:
Discrete
-> Transistors
-> FETs (Field Effect Transistors)
-> MOSFETs
-> Power MOSFETs
-> High Voltage
Description: For Lowest Conduction Losses & Fastest Switching
Company: Infineon Technologies Corporation
Datasheet: Download SPI07N60C3 datasheet File size : 456 kB
Request For quote: Find where to buy SPI07N60C3
Datasheet text preview:
Final data
SPP07N60C3, SPB07N60C3 SPI07N60C3, SPA07N60C3
VDS @ Tjmax RDS(on) ID 650 0.6 7.3 V A
Cool MOSTM Power Transistor
Feature · New revolutionary high voltage technology · Ultra low gate charge · Periodic avalanche rated · Extreme dv/dt rated · High peak current capability · Improved transconductance
P-TO220-3-31 1 2 3
P-TO220-3-31
P-TO262-3-1
P-TO263-3-2
P-TO220-3-1
· P-TO-220-3-31: Fully isolated package (2500 VAC; 1 minute)
Type SPP07N60C3 SPB07N60C3 SPI07N60C3 SPA07N60C3 Maximum Ratings Parameter
Package P-TO220-3-1 P-TO263-3-2 P-TO262-3-1
Ordering Code Q67040-S4422 Q67040-S4394 Q67040-S4424
Marking 07N60C3 07N60C3 07N60C3 07N60C3
P-TO220-3-31 Q67040-S4409
Symbol ID 7.3 4.6 ID puls EAS EAR IAR dv/dt VGS VGS Ptot Tj , Tstg
Page 1
Value SPP_B_I SPA
Unit A
Continuous drain current
TC = 25 °C TC = 100 °C
7.31) 4.61) 21.9 230 0.5 7.3 6 ±20 ±30 32 W °C A V/ns V A mJ
Pulsed drain current, tp limited by Tjmax Avalanche energy, single pulse
ID =5.5A, VDD =50V
21.9 230 0.5 7.3 6 ±20 ±30 83
Avalanche energy, repetitive tAR limited by Tjmax 2)
ID =7.3A, VDD =50V
Avalanche current, repetitive tAR limited by Tjmax Reverse diode dv/dt
IS = 7.3 A, VDS < VDD , di/dt=100A/µs, Tjmax =150°C
Gate source voltage static Gate source voltage AC (f >1Hz) Power dissipation, TC = 25°C Operating and storage temperature
-55...+150
2002-10-15
Final data Thermal Characteristics Parameter Characteristics Thermal resistance, junction - case Thremal resistance, junction - case, FullPAK Thermal resistance, junction - ambient, leaded Thermal resistance, junction - ambient, FullPAK SMD version, device on PCB: @ min. footprint @ 6 cm2 cooling area 3) Linear derating factor Linear derating factor, FullPAK Soldering temperature, 1.6 mm (0.063 in.) from case for 10s Tsold RthJC
SPP07N60C3, SPB07N60C3 SPI07N60C3, SPA07N60C3
Symbol min. -
Values typ. 35 max. 1.5 3.9 62 80 62 0.66 0.25 260
Unit
K/W
RthJC_FP RthJA RthJA_FP RthJA
W/K °C
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified Static Characteristics Drain-source breakdown voltage
VGS =0V, ID =0.25mA
V(BR)DSS V(BR)DS VGS(th) IDSS
600 2.1
700 3
3.9
V
Drain-source avalanche breakdown voltage
VGS =0V, ID =7.3A
Gate threshold voltage, VGS = VDS
ID = 350 µA
Zero gate voltage drain current
VDS = 600 V, VGS = 0 V, Tj = 25 °C VDS = 600 V, VGS = 0 V, Tj = 150 °C
µA 0.5 0.54 0.8 1 100 100 0.6 nA
Gate-source leakage current
VGS =30V, VDS=0V
IGSS RDS(on) RG
-
Drain-source on-state resistance
VGS =10V, ID=4.6A, Tj =25°C
Gate input resistance f = 1 MHz, open drain
Page 2
2002-10-15
Final data Electrical Characteristics Parameter Characteristics Transconductance Input capacitance Output capacitance Reverse transfer capacitance energy related Effective output capacitance, 5) Co(tr) time related Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Qgs Qgd Qg td(on) tr td(off) tf gfs Ciss Coss Crss
VGS =0V, VDS =0V to 480V
SPP07N60C3, SPB07N60C3 SPI07N60C3, SPA07N60C3
Symbol
Conditions min.
VDS 2*ID *RDS(on)max, ID =4.6A VGS =0V, VDS =25V, f=1MHz
Values typ. 6 790 260 16 30 55 6 3.5 60 7 3 9.2 21 5.5 max. 100 15 27 -
Unit
-
S pF
Effective output capacitance, 4) Co(er)
VDD =380V, VGS =0/13V, ID =7.3A, RG=12, Tj=125°C
-
ns
VDD =480V, ID =7.3A
-
nC
VDD =480V, ID =7.3A, VGS =0 to 10V
V(plateau) VDD =480V, ID =7.3A
V
1Limited only by maximum temperature 2Repetitve avalanche causes additional power losses that can be calculated as P
AV =EAR*f.
3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain connection. PCB is vertical without blown air. 4C is a fixed capacitance that gives the same stored energy as C while V is rising from 0 to 80% V
o(er) oss DS
DSS .
5C o(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .
Page 3
2002-10-15
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