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Details, datasheet, quote on part number:W27E520W-90
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Datasheet text preview:
Advance Information W27E520 64K × 8 ELECTRICALLY ERASABLE EPROM
GENERAL DESCRIPTION
The W27E520 is a high speed, low power Electrically Erasable and Programmable Read Only Memory organized as 65,536 × 8 bits. It includes latches for the lower 8 address lines to multiplex with the 8 data lines. To cooperate with the MCU, this device could save the external TTL component, also cost and space. It requires only one supply in the range of 4.5V to 5.5V in normal read mode. The W27E520 provides an electrical chip erase function. It will be a great convenient when you need to change/update the contents in the device.
FEATURES
· High speed access time: 70/90 nS (max.) · Read operating current: 20 mA (max.) · Erase/Programming operating current · High Reliability CMOS Technology - 2K V ESD Protection - 200 mA Latchup Immunity · Fully static operation · All inputs and outputs directly LVTTL/CMOS
30 mA (max.)
· Standby current: 100 µA (max.) · Unregulated battery power supply range,
compatible
· Three-state outputs · Available packages: 20-pin TSSOP and 20-pin
4.5V to 5.5V
· +13V erase and programming voltage
SOP
PIN CONFIGURATIONS
A10 A12 A14 ALE VDD OE/VPP A15 A13 A11 A9
1 2 3 4 5 6 7 8 9 10 20 19 18 17
BLOCK DIAGRAM
A8 AD1 AD3 AD5 AD7 GND AD6 AD4 AD2 AD0
VDD GND A15 - A8 AD7 - AD0
L A T C H E S
ALE OE / VP P
CONTROL
OUTPUT BUFFER
TSSOP 16 Top View
15 14 13 12
DECODER
MEMORY ARRAY
11
OE/VPP A15 A13 A11 A9 AD0 AD2 AD4 AD6 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17
VDD ALE A14 A12 A10 A8 AD1 AD3 AD5 AD7
PIN DESCRIPTION
SYMBOL AD0-AD7 A8-A15 ALE OE /VPP VDD GND DESCRIPTION Address/Data Inputs/Outputs Address Inputs Address Latch Enable Output Enable, Program/Erase Supply Voltage Power Supply Ground
SOP 16 Top View
15 14 13 12
11
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Publication Release Date: 4/26/2000 Revision A1
Advance Information W27E520
FUNCTIONAL DESCRIPTION
Read Mode
Unlike conventional UVEPROMs, which has CE and OE two control functions, the W27E520 has one OE /VPP and one ALE (address_latch_enable) control functions. The ALE makes lower address A[7:0] to be latched in the chip when it goes from high to low, so that the same bus can be used to output data during read mode. i.e. lower address A[7:0] and data bus DQ[7:0] are multiplexed. OE/VPP controls the output buffer to gate data to the output pins. When addresses are stable, the address access time (TACC) is equal to the delay from ALE to output (TCE), and data are available at the outputs TOE after the falling edge of OE/VPP, if TACC and TCE timings are met.
Erase Mode
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs, which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half an hour), the W27E520 uses electrical erasure. Generally, the chip can be erased within 100 mS by using an EPROM writer with a special erase algorithm. There are two ways to enter Erase mode. One is to raise OE/VPP to VPE (13V), VDD = VDE (6.5V), A9 = VHH (13V), A10 = high A8&A11 = low, and all other address pins include AD[7:0] keep at fixed low or high. Pulsing ALE high starts the erase operation. The other way is somewhat like flash, by programming two consecutive commands into the device and then enter Erase mode. The two commands are loading Data = AA(hex) to Addr. = 5555(hex) and Data = 10(hex) to Addr. = 2AAA(hex). Be careful to note that the ALE pulse widths of these two commands are different: One is 50uS, while the other is 100mS. Please refer to the Smart Erase Algorithm 1 & 2.
Erase Verify Mode
The device will enter the Erase Verify Mode automatically after Erase Mode. Only power down the device can force the device enter Normal Read Mode again.
Program Mode
Programming is the only way to change cell data from "1" to "0." The program mode is entered when OE /VPP is raised to VPP (13V), VDD = VDP (6.5V), the address pins equal the desired addresses, and the input pins equal the desired inputs. Pulsing ALE high starts the programming operation.
Program Verify Mode
The device will enter the Program Verify Mode automatically after Program Mode. Only power down the device can force the device enter Normal Read Mode again.
Erase/Program Inhibit
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different data. When ALE low, erasing or programming of non-target chips is inhibited, so that except for the ALE and OE/VPP pins, the W27E520 may have common inputs.
Standby Mode
The standby mode significantly reduces VDD current. This mode is entered when ALE and OE/VPP keep high. In standby mode, all outputs are in a high impedance state.
System Considerations
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Advance Information W27E520
An EPROM's power switching characteristics require careful device decoupling. System designers are interested in three supply current issues: standby current levels (ISB), active current levels (IDD), and transient current peaks produced by the falling and rising edges of ALE Transient current magnitudes depend on the device output's capacitive and inductive loading. Proper decoupling capacitor selection will suppress transient voltage peaks. Each device should have a 0.1 µF ceramic capacitor connected between its VDD and GND. This high frequency, low inherentinductance capacitor should be placed as close as possible to the device. Additionally, for every eight devices, a 4.7 µF electrolytic capacitor should be placed at the array's power supply connection between VDD and GND. The bulk capacitor will overcome voltage slumps caused by PC board trace inductances.
TABLE OF OPERATING MODES
(VPP = 13V, VPE = 13V, VHH = 12V, VDP = 6.5V, VDE = 6.5V, VDD = 5.0V, VDI = 5.0V, X = VIH or VIL)
MODE ALE Address Latch Enable Read Output Disable Standby Program Erase 1 Erase 2 VIH VIL VIL VIH VIH VIH VIH OE /VPP VIH VIL VIH VIH VPP VPE VPE
PIN OTHER ADDRESS X AIN X AIN AIN A8&A11 = VIL, A9 = VPE, A10 = VIH, Others = X First command: Addr. = 5555 (hex) Secon command: Addr. = 2AAA (hex)
VDD VDD VDD VDD VDD VDP VDE VDE VDE VDI VDI
AD[7:0] A[7:0] DOUT High Z A[7:0] DIN X AA(hex) 10(hex) DA(Hex) 1F(Hex)
Product Identifiermanufacturer Product Identifier-device
VIL VIL
VIL VIL
A8 = VIL, A9 = VHH, Others = X A8 = VIH, A9 = VHH, Others = X
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Publication Release Date: 4/26/2000 Revision A1
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