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Part: 49FCT3805
Category:
Timing Circuits
-> Clock Buffers
Description: Dual 1:5 Clock Driver
Company: Integrated Device Technology, Inc.
Datasheet: Download 49FCT3805 datasheet File size : 220 kB
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Datasheet text preview:
IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS BUFFER/CLOCK DRIVER
IDT49FCT3805/A
FEATURES:
· · · · · · · · · · ·
DESCRIPTION:
0.5 MICRON CMOS Technology Guaranteed low skew < 500ps (max.) Very low duty cycle distortion < 1.0ns (max.) Very low CMOS power levels TTL compatible inputs and outputs Inputs can be driven from 3.3V or 5V components Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output VCC = 3.3V ± 0.3V Available in SSOP, SOIC, and QSOP packages
The FCT3805 is a 3.3 volt, non-inverting clock driver built using advanced dual metal CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT3805 offers low capacitance inputs with hysteresis. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality.
FUNCTIONAL BLOCK DIAGRAM
OEA 5 IN A OA1 - OA5
PIN CONFIGURATION
VCCA OA 1 OA 2 OA 3 GNDA 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCCB OB1 OB2 OB3 GNDB OB4 OB5 MO N OEB INB
IN B OEB
5 OB1 - OB5
OA 4 OA 5 GNDQ
MON
OEA INA
SOIC/ SSOP/ QSOP TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
c 2001 Integrated Device Technology, Inc.
SEPTEMBER 2001
DSC-3102/2
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IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) VTERM(4) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max 0.5 to +4.6 0.5 to +7 0.5 to VCC+0.5 65 to +150 60 to +60 Unit V V V °C mA
PIN DESCRIPTION
Pin Names OEA, OEB INA, INB OAn, OBn MON Clock Inputs Clock Outputs Monitor Output Description 3-State Output Enable Inputs (Active LOW)
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . VCC terminals. 3 . Input terminals. 4 . Outputs and I/O terminals.
FUNCTION TABLE (1)
Inputs OEA, OEB L L H H
NOTE: 1. H = HIGH L = LOW Z = High-Impedance
Outputs INA, INB L H L H OAn, OBn L H Z Z MON L H L H
CAPACITANCE (TA = +25 C, f = 1.0MHz)
O
Symbol CI N COUT
Parameter(1) Input Capacitance Output Capacitance
Conditions VIN = 0V VOUT = 0V
Typ. 4.5 5.5
Max. 6 8
Unit pF pF
NOTE: 1 . This parameter is measured at characterization but not tested.
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IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified Commercial: TA = 0°C to +70°C, Industrial: TA = -40°C to +85°C, VCC = 3.3V ± 0.3V
Symbol VIH VIL IIH IIL IOZH IOZL VIK IODH IODL VOH VOL Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedence Output Current (3-State Output Pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage Output LOW Voltage VCC = Min., IIN = 18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL IOFF IOS VH ICCL ICCH ICCZ
NOTES: 1 . For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at Vcc = 3.3V, +25°C ambient. 3 . Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4 . This parameter is guaranteed but not tested. 5 . VOH = Vcc - 0.6V at rated current.
Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND VO = VCC VO = GND
Min. 2 2 0.5 -- -- -- -- -- -- -- 36 50 VCC0.2 2.4(5) -- -- -- -- 60 -- -- --
Typ. -- -- -- -- -- -- -- -- -- 0.7 60 90 -- 3 -- 0.2 0.3 -- 135 150 0.1
Max. 5.5 VCC + 0.5 0.8 ±1 ±1 ±1 ±1 ±1 ±1 1.2 110 200 -- -- 0.2 0.4 0.5 ±1 240 -- 10
Unit V V µA
µA V mA mA V V µA mA mV µA
IOH = 0.1mA IOH = 8mA IOL = 0.1mA IOL = 16mA IOL = 24mA
Input Power Off Leakage Short Circuit Current(4) Input Hysteresis Quiescent Power Supply Current
VCC = 0V, VIN = 4.5V VCC = Max., VO = VCC = Max. VIN = GND or VCC GND(3)
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IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) VCC = Max. VIN = VCC 0.6V(3) VCC = Max. Outputs Open OEA = OEB = GND Per Output Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. Outputs Open fO = 25MHz 50% Duty Cycle OEA = OEB = VCC Mon. Output Toggling VCC = Max. Outputs Open fO = 50MHz 50% Duty Cycle OEA = OEB = GND Eleven Outputs Toggling
NOTES: 1. 2. 3. 4. 5. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 3.3V, +25°C ambient. Per TTL driven input (VIN = VCC -0.6V); all other inputs at VCC or GND. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. Values for these conditions are examples of the IC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz.
Test Conditions(1)
Min. --
Typ.(2) 10 0.035
Max. 30 0.06
Unit µA mA/MHz
VIN = VCC VIN = GND
--
VIN = VCC VIN = GND VIN = VCC 0.6V VIN = GND VIN = VCC VIN = GND VIN = VCC 0.6V VIN = GND
--
0.9
1.6
--
0.9
1.6
--
20
33
(5)
mA
--
20
33
(5)
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IDT49FCT3805/A 3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - COMMERCIAL(3,4)
Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay INA to OAn, INB to OBn Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL - tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, tPZL tPZH tPLZ tPHZ temperature, package type and speed grade Output Enable Time OEA to OAn, OEB to OBn Output Disable Time OEA to OAn, OEB to OBn 1.5 1.5 6.5 5.5 1.5 1.5 6 5 ns ns Conditions(1) CL = 50pF RL = 500 FCT3805 Min.(2) Max. 1.5 -- -- -- -- -- 5.8 2 2 0.5 1 1.5 FCT3805A Min.(2) Max. 1.5 -- -- -- -- -- 5 2 2 0.5 1 1.2 Unit ns ns ns ns ns ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL(3,4)
Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(T) Parameter Propagation Delay INA to OAn, INB to OBn Output Rise Time Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL - tPLH|) Package skew: skew between outputs of different packages at same power supply voltage, tPZL tPZH tPLZ tPHZ temperature, package type and speed grade Output Enable Time OEA to OAn, OEB to OBn Output Disable Time OEA to OAn, OEB to OBn 1.5 1.5 6.5 5.5 1.5 1.5 6 5 ns ns Conditions(1) CL = 50pF RL = 500 FCT3805 Min.(2) Max. 1.5 -- -- -- -- -- 5.8 2 2 0.6 1 1.5 FCT3805A Min.(2) Max. 1.5 -- -- -- -- -- 5.2 2 2 0.6 1 1.2 Unit ns ns ns ns ns ns
NOTES: 1 . See test circuits and waveforms. 2 . Minimum limits are guaranteed but not tested on Propagation Delays. 3 . tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4 . Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
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