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Part: 70V9079
Category:
Interface and Interconnect
-> Multi-Ports
Description: 32K X 8 Sync, 3.3V Dual-port RAM, Pipelined/flow-through
Company: Integrated Device Technology, Inc.
Datasheet: Download 70V9079 datasheet File size : 115 kB
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Datasheet text preview:
HIGH-SPEED 3.3V 32K x 8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
Features:
x x
PRELIMINARY IDT70V9079S/L
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x
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True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access Commercial: 9/12/15ns (max.) Low-power operation IDT70V9079S Active: 429mW (typ.) Standby: 3.3mW (typ.) IDT70V9079L Active: 429mW (typ.) Standby: 1.32mW (typ.) Flow-Through or Pipelined output mode on Right Port via the FT/PIPER pin Counter enable and reset features Dual chip enables allow for depth expansion without
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x
x x
x
additional logic Full synchronous operation on both ports 4ns setup to clock and 1ns hold on all control, data, and address inputs Data input, address, and control registers Fast 9ns clock to data out in the Pipelined output mode Self-timed write allows fast cycle time 15ns cycle time, 66MHz operation in the Pipelined output mode Separate upper-byte and lower-byte controls for multiplexed bus and bus matching compatibility LVTTL- compatible, single 3.3V (±0.3V) power supply Industrial temperature range (40°C to +85°C) is available for selected speeds Available in a 100 pin Thin Quad Flatpack (TQFP)
Functional Block Diagram
R/WL OEL CE0L CE1L R/WR OER CE0R CE1R
1 0 0/1
0
1
0/1
FT/PIPER
I/O0L - I/O7L
I/O0R - I/O7R I/O Control I/O Control
A14L A0L CLKL ADSL CNTENL CNTRSTL Counter/ Address Reg. MEMORY ARRAY Counter/ Address Reg.
A14R A0R CLKR ADSR CNTENR CNTRSTR
3753 drw 01
JUNE 1999
1
©1999 Integrated Device Technology, Inc. DSC 3753/4
IDT70V9079S/L High Speed 3.3V 32K x 8 Synchronous Pipelined Dual-Port Static RAM
Preliminary Industrial and Commercial Temperature Ranges
The IDT70V9079 is a high-speed 32K x 8 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times.
Description:
With an input data register, the IDT70V9079 has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very LOW standby power mode. Fabricated using IDTs CMOS high-performance technology, these devices typically operate on only 429mW of power.
Pin Configurations(1,2,3)
Index
NC NC A7L A8L A9L A10L A11L A12L A13L A14L NC NC VCC NC NC NC NC CE0L CE1L CNTRSTL R/WL OEL VCC NC NC
100 99 98 97 96 9 5 9 4 93 92 91 90 89 8 8 87 86 85 84 83 8 2 81 80 79 78 77 7 6 75 2 74 3 73 1 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 72 71 70 69 68 67
NC NC A6L A5L A4L A3L A2L A1L A0L CNTENL CLKL ADSL GND ADSR CLKR CNTENR A0R A1R A2R A3R A4R A5R A6R NC NC
IDT70V9079PF PN100-1(4) 100-Pin TQFP Top View(5)
66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
51 25 2 6 27 28 29 30 3 1 3 2 33 34 35 36 37 3 8 39 40 41 42 43 4 4 45 46 47 48 49 5 0
NC NC A7R A8R A9R A10R A11R A12R A13R A14R NC NC GND NC NC NC NC CE0R CE1R CNTRSTR R/WR OER FT/PIPER GND NC
37 53 drw 02
NOTES: 1 . All Vcc pins must be connected to power supply. 2 . All GND pins must be connected to ground supply. 3 . Package body is approximately 14mm x 14mm x 1.4mm. 4 . This package code is used to reference the package diagram. 5 . This text does not indicate orientation of the actual part-marking.
GND NC I/O7L I/O6L I/O5L I/O4L I/O3L I/O2L GND I/OIL I/O0L VCC GND I/O0R I/O1R I/O2R VCC I/O3R I/O4R I/O5R I/O6R I/O7R NC NC NC
6.42 2
IDT70V9079S/L High Speed 3.3V 32K x 8 Synchronous Pipelined Dual-Port Static RAM
Preliminary Industrial and Commercial Temperature Ranges
Pin Names
Left Port C E0L, CE1L R/ WL OEL A0L - A14L I/O0L - I/O7L CLK L AD SL CN TENL C NTRSTL
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Right Port C E0R, CE1R R/ WR OER A 0R - A14R I/O0R - I/O7R CLK R AD SR CN TENR C NTRSTR FT/ P IP ER VCC GND
Nam es Chip Enables Re ad / Write Enable Outp ut Enable A d d re s s Data Input/Output Clo ck A d d re s s Strobe Co unte r Enable Co unte r Reset Flo w-Thro ug h/P ip e line P o we r Gro und
3753 tbl 01
Tr uth Table IRead/Write and Enable Control(1,2,3)
OE
X X X L H CLK X
CE0
H X L L L
CE1
X L H H H
R/ W X X L H X
I /O0 -7 Hig h-Z Hig h-Z DATAIN DATAOUT Hig h-Z
M ode De s e le c te d De s e le c te d Write Re ad Outp uts Disabled
3753 tbl 02
NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. ADS, CNTEN, CNTRST = X. 3. OE is an asynchronous input signal.
Tr uth Table IIAddress Counter Control(1,2)
Address X An X X P revi ous Address X X An An CLK AD S H L(4) H H CN TEN H H H L
(5)
C NTRST L H H H
I /O (3) DATA I/ O( 0) DATA I/ O( n) DATA I/ O( n) DATA I/ O(n+ 1)
Mode Co unte r Reset to Address 0 E xte rnal Address Utilized E xte rnal Address BlockedCounter Disabled Co unte r EnableInternal Address Generation
3753 tbl 03
NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. CE0 and OE = VIL; CE1 and R/W = VIH. 3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle. 4. ADS is independent of all other signals including CE0 and CE1. 5. The address counter advances if CNTEN = VIL on the rising edge of CLK, regardless of all other signals including CE0 and CE1.
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IDT70V9079S/L High Speed 3.3V 32K x 8 Synchronous Pipelined Dual-Port Static RAM
Preliminary Industrial and Commercial Temperature Ranges
Recommended Operating Temperature and Supply Voltage(1,2)
Grade Co mme rcial Ind ustrial Am bi ent Tem perature 0OC to +70OC -40OC to +85OC GND 0V 0V V cc 3. 3V + 0.3V 3. 3V + 0.3V
3 7 53 tbl 04
Recommend DC Operating Conditions
S ym bol VCC GND V IH V IL P aram eter S up p ly Voltage Gro und Inp ut High Voltage Inp ut Low Voltage M in . 3. 0 0 2. 2 -0.3(2 ) Typ. 3. 3 0
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M ax. 3. 6 0 V CC + 0.3V(2 ) 0. 8
Unit V V V V
37 53 tbl 05
NOTES: 1. This is the parameter TA. 2 . Industrial temperature: for specific speeds, packages and powers contact your sales office.
NOTES: 1 . VTERM must not exceed VCC +0.3V. 2 . VIL > -1.5V for pulse width less than 10ns.
Absolute Maximum Ratings(1)
S ym bol VTERM(2) Rati ng Te rminal Voltage with Respect to GND Te mp e rature Und e r Bias S to rag e Te mp e rature DC Output Curre nt Com m ercial & Industrial -0.5 to +4.6 Uni t V
Capacitance (TA = +25°C, f = 1.0MHZ)
S ym b o l CIN COUT
(3)
Param eter(1) Inp ut Capacitance Outp ut Capacitance
Conditions(2) VIN = 3dV V OUT = 3dV
Max. 9 10
Unit pF pF
3753 tbl 07
TBIAS TSTG IO UT
-55 to +125 -55 to +125 50
o
C C
o
mA
3753 tbl 06
NOTES: 1 . These parameters are determined by device characterization, but are not production tested. 2 . 3dV references the interpolated capacitance when the input and output switch from 0V to 3V or from 3V to 0V. 3 . COUT also references CI/O.
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . VTERM must not exceed VCC +0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to Vcc + 0.3V.
6.42 4
IDT70V9079S/L High Speed 3.3V 32K x 8 Synchronous Pipelined Dual-Port Static RAM
Preliminary Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating Temper ature and Supply Voltage Range (VCC = 3.3V ± 0.3V)
70V9079S S ym bol |ILI| |ILO| V OL V OH P aram eter Inp ut Leakage Current(1) Outp ut Leakage Current Outp ut Low Voltage Outp ut High Voltage Test Conditions V CC = 3.3V, VIN = 0V to VCC C E0 = VIH or CE1 = VIL, VOUT = 0V to VCC IOL = +4mA IOH = -4mA Mi n.
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70V9079L Mi n.
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Max. 10 10 0. 4
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Max. 5 5 0. 4
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Uni t µA µA V V
3753 tbl 08
2. 4
2. 4
NOTE: 1 . At Vcc < 2.0V input leakages are undefined.
DC Electrical Characteristics Over the Operating Temper ature and Supply Voltage Range(6,7) (VCC = 3.3V ± 0.3V)
70V9079X 9 Com 'l Only S ym bol ICC P aram eter Dynamic Operating Curre nt (B o th Ports Active) Test Condition C EL and CER = VIL Outp uts Open f = fMAX(1) V ersi on COM'L IND COM'L IND C E"A " = VIL and C E"B " = VIH(3) A ctiv e Port Outputs Open, f= fMA X(1) B o th Ports CER and C EL > VCC - 0.2V V IN > VCC - 0.2V or V IN VCC - 0.2V(5) V IN > VCC - 0.2V or V IN < 0.2V, Active Port O utp uts Open, f = fMAX(1) COM'L IND COM'L IND COM'L IND S L S L S L S L S L S L S L S L S L S L Typ. (4) 180 180
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70V9079X 12 Com 'l Only Typ. (4) 150 150
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70V9079X 15 Com 'l Only Typ. (4) 130 130
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Max. 260 225
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Max. 240 205
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Max. 220 185
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Uni t mA
IS B 1
S tand b y Current (B o th Ports - TTL Le ve l Inputs)
C EL and CER = VIH f = fMAX(1)
50 50
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75 65
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40 40
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65 50
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30 30
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55 35
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mA
IS B 2
S tand b y Current (One Port - TTL Le ve l Inputs)
110 110
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170 150
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100 100
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160 140
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90 90
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150 130
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mA
IS B 3
Full Standby Current (B o th Ports CMOS Level Inputs)
1. 0 0. 4
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5 3
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1. 0 0. 4
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5 3
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1. 0 0. 4
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5 3
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mA
IS B 4
Full Standby Current (One Port CMOS Level Inputs)
100 100
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160 140
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90 90
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150 130
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80 80
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140 120
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mA
NOTES: 1 . At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input levels of GND to 3V. 2 . f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby. 3 . Port "A" may be either left or right port. Port "B" is the opposite from port "A". 4 . Vcc = 3.3V, TA = 25°C for Typ, and are not production tested. ICC DC(f=0) = 90mA (Typ). 5 . CEX = VIL means CE0X = VIL and CE1X = VIH CEX = VIH means CE0X = VIH or CE1X = VIL CEX VCC - 0.2V CEX > VCC - 0.2V means CE0X > VCC - 0.2V or CE1X < 0.2V 'X' represents "L" for left port or "R" for right port. 6 . 'X' in part number indicates power rating (S or L). 7 . Industrial temperature: for specific speeds, packages and powers contact your sales office.
3753 tbl 09
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Others parts begin by 70
70-1 70-2 70-3
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