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Part: 70V9099
Category:
Interface and Interconnect
-> Multi-Ports
Description: 128K X 8 Sync, 3.3V Dual-port RAM, Pipelined/flow-through
Company: Integrated Device Technology, Inc.
Datasheet: Download 70V9099 datasheet File size : 115 kB
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Datasheet text preview:
HIGH-SPEED 3.3V 128K x 8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM
Features:
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PRELIMINARY IDT70V9099L
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True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access Commercial: 7.5/9/12ns (max.) Low-power operation IDT70V9099L Active: 500mW (typ.) Standby: 1.5mW (typ.) Flow-Through or Pipelined output mode on either port via the FT/PIPE pins Counter enable and reset features Dual chip enables allow for depth expansion without additional logic
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x x
x
Full synchronous operation on both ports 4ns setup to clock and 0ns hold on all control, data, and address inputs Data input, address, and control registers Fast 7.5ns clock to data out in the Pipelined output mode Self-timed write allows fast cycle time 12ns cycle time, 83MHz operation in Pipelined output mode LVTTL- compatible, single 3.3V (±0.3V) power supply Industrial temperature range (40°C to +85°C) is available for selected speeds Available in a 100-pin Thin Quad Flatpack (TQFP)
Functional Block Diagram
R/WL OEL CE0L CE1L R/WR OER CE0R CE1R
1 0 0/1
1 0 0/1
FT/PIPEL
0/1
1
0
0
1
0/1
FT/PIPER
I/O0L - I/O7L I/O Control I/O Control
I/O0R - I/O7R
A16L A0L CLKL ADSL CNTENL CNTRSTL Counter/ Address Reg. MEMORY ARRAY Counter/ Address Reg.
A16R A0R CLKR ADSR CNTENR CNTRSTR
4858 drw 01
JUNE 2000
1
©2000 Integrated Device Technology, Inc. DSC-4858/2
IDT70V9099L High-Speed 128K x 8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Description:
The IDT70V9099 is a high-speed 128K x 8 bit synchronous DualPort RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. With an input data register, the IDT70V9099 has been optimized for applications having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 500mW of power.
Index
NC NC A7L A8L A9L A10L A11L A12L A13L A14L A15L A16L VCC NC NC NC NC CE0L CE1L CNTRSTL R/WL OEL FT/PIPEL NC NC
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 2 74 3 73 4 72 1 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 71 70 69 68 67 66
NC NC A6L A5L A4L A3L A2L A1L A0L CNTENL CLKL ADSL GND ADSR CLKR CNTENR A0R A1R A2R A3R A4R A5R A6R NC NC
Pin Configuration(1,2,3)
70V 9099P F P N100-1(4) 100-P in TQFP Top V iew(5)
65 64 63 62 61 60 59 58 57 56 55 54 53 52
51 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
NC NC A7R A8R A9R A10R A11R A12R A13R A14R A15R A16R GND NC NC NC NC CE0R CE1R CNTRSTR R/WR OER FT/PIPER GND NC
4858 drw 02
NOTES: 1 . All Vcc pins must be connected to power supply. 2 . All GND pins must be connected to ground. 3 . Package body is approximately 14mm x 14mm x 1.4mm. 4 . This package code is used to reference the package diagram. 5 . This text does not indicate orientation of the actual part-marking.
GND NC I/O7L I/O6L I/O5L I/O4L I/O3L I/O2L GND I/OIL I/O0L VCC GND I/O0R I/O1R I/O2R VCC I/O3R I/O4R I/O5R I/O6R I/O7R NC NC NC
6.42 2
IDT70V9099L High-Speed 128K x 8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Pin Names
Left Port C E0L, CE1L R/WL OEL A0L - A16L I/O0L - I/O7L CLKL AD SL CN TENL C NTRSTL FT/PIPEL Right Port C E0R, CE1R R/WR OER A0R - A16R I/O0R - I/O7R CLKR AD SR CN TENR C NTRSTR FT/PIPER VCC GND Names Chip Enables Read /Write Enable Output Enable Add ress Data Input/Output Clo ck Add ress Strobe Enable Counte r Enable Counte r Reset Flo w-Thro ug h / Pipeline Power Ground
4858 tbl 01
Tr uth Table IRead/Write and Enable Control(1,2,3)
OE X X X L H CLK X C E0 H X L L L CE1 X L H H H R/W X X L H X I/O0 -7 Hig h-Z Hig h-Z DATA IN DATAOUT Hig h-Z Des elec te dPower Down Des elec te dPower Down Write to Lower Byte Only Read Lower Byte Only Outputs Disabled
4858 tbl 02
MODE
NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. ADS, CNTEN, CNTRST = X. 3. OE is an asynchronous input signal.
Tr uth Table IIAddress Counter Control(1,2,6)
Address X An An X Previous Address X X Ap Ap Addr Used 0 An Ap Ap + 1 CLK AD S X L(4) H H CN TEN X X H L
(5)
C NTRST L H H H
I/O(3) DI/ O(0) DI/ O(n) DI/ O(n) DI/ O(n+ 1) Counte r Reset to Address 0 External Address Used
MODE
External Address Blocked--Counter disabled (Ap reused) Counte r Enabled--Internal Address generation
4858 tbl 03
NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don't Care. 2. CE0 and OE = VIL; CE1 and R/W = VIH. 3. Outputs configured in Flow-Through Output mode; if outputs are in Pipelined mode the data out will be delayed by one cycle. 4. ADS is independent of all other signals including CE0 and CE1. 5. The address counter advances if CNTEN = VIL on the rising edge of CLK, regardless of all other signals including CE0 and CE1. 6. While an external address is being loaded (ADS = VIL), R/W = VIH is recommended to ensure data is not written arbitrarily.
6.42 3
IDT70V9099L High-Speed 128K x 8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
Recommended Operating Temper ature and Supply Voltage(1)
Grade Com merc ial Ind ustrial Ambient Tem perature(2) 0OC to +70OC -40OC to +85OC GND 0V 0V Vcc 3.3V + 0.3V 3.3V + 0.3V
4858 tbl 04
Recommended DC Operating Conditions
Symbol VCC GND VIH V IL Parameter Supp ly Voltage Ground Input High Voltage Input Low Voltage Min. 3. 0 0 2. 0V -0.3
(1)
Typ. 3. 3 0
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Max. 3. 6 0 VCC+ 0.3V 0. 8
(2)
Unit V V V V
48 58 tbl 05
NOTES: 1 . Industrial temperature: for specific speeds, packages and powers contact your sales office. 2 . This is the parameter TA. This is the "instant on" case temperature.
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NOTES: 1 . VIL > -1.5V for pulse width less than 10 ns. 2 . VTERM must not exceed VCC +0.3V.
Absolute Maximum Ratings(1)
Sym bol VTE RM(2) Rating Terminal Voltage with Respect to GND Temp e rature Und e r Bias Sto rage Temp e rature DC Output Current Commerci al & Industrial -0.5 to +4.6 Uni t V
Capacitance(1)
Symbol CIN COUT
(3 )
(TA = +25°C, f = 1.0MHZ)
Parameter Inp ut Capacitance Output Capacitance Conditions(2) VIN = 3dV VOUT = 3dV Max. 9 10 Unit pF pF
4858 tbl 07
TB IAS TS TG IO UT
-55 to +125 -65 to +150 50
o
C C
o
mA
4858 tbl 06
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . VTERM must not exceed VCC +0.3V for more than 25% of the cycle time or 10ns maximum, and is limited to VCC + 0.3V.
NOTES: 1. These parameters are determined by device characterization, but are not production tested. 2. 3dV references the interpolated capacitance when the input and output switch from 0V to 3V or from 3V to 0V. 3. COUT also references CI/O.
DC Electrical Characteristics Over the Operating Temper ature and Supply Voltage Range (VCC = 3.3V ± 0.3V)
70V9099L Symbol |ILI| |ILO| VO L VOH Param eter Inp ut Leakage Current(1) Output Leakage Current Output Low Voltage Output High Voltage VCC = 3.6V, VIN = 0V to VCC C E = VIH or CE1 = VIL, VOUT = 0V to VCC IO L = +4mA IOH = -4mA Test Conditions Min.
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Max. 5 5 0.4
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Unit µA µA V V
4858 tbl 08
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2.4
NOTE: 1 . At Vcc < 2.0V input leakages are undefined.
6.42 4
IDT70V9099L High-Speed 128K x 8 Dual-Port Synchronous Pipelined Static RAM
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating Temper ature Supply Voltage Range(3,6) (VCC = 3.3V ± 0.3V)
70V9099L7 Com'l Only Symbol ICC Parameter Dynamic Operating Curre nt (Both Ports Active) Stand b y Current (Both Ports - TTL Le ve l Inputs) Stand b y Curre nt (One Po rt - TTL Le ve l Inputs) Full Standby Curre nt (Both Ports - CMOS Le ve l Inputs) Full Standby Curre nt (One Port - CMOS Le ve l Inputs) Test Condition C EL and CER= VIL, Outp uts Disabled, f = fMAX(1) C EL = CER = VIH f = fMAX(1) Version COM' L IND COM' L IND L L L L L L L L L L Typ. (4) 200
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70V9099L9 Com'l Only Typ.(4) 180
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70V9099L12 Com'l Only Typ.(4) 150
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Max. 310
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Max. 260
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Max. 230
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Unit mA
IS B1
65
____
130
____
50
____
100
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40
____
80
____
mA
IS B2
COM' L C E"A " = VIL and C E"B " = VIH(5) Active Port Outputs Disabled, IND f=fMAX(1) Both Ports CEL and C ER > VCC - 0.2V, VIN > VCC - 0.2V or VIN VCC - 0.2V(5) VIN > VCC - 0.2V or VIN < 0.2V, Active Port, Outp uts Disabled , f = fMAX(1) COM' L IND COM' L IND
140
____
245
____
110
____
190
____
100
____
175
____
mA
IS B3
0.4
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3
____
0.4
____
3
____
0.4
____
3
____
mA
IS B4
130
____
235
____
100
____
180
____
90
____
165
____
mA
NOTES: 1 . At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using "AC TEST CONDITIONS" at input levels of GND to 3V. 2 . f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby. 3 . Port "A" may be either left or right port. Port "B" is the opposite from port "A". 4 . Vcc = 3.3V, TA = 25°C for Typ, and are not production tested. ICC DC(f=0) = 90mA (Typ). 5 . CEX = VIL means CE0X = VIL and CE1X = VIH CEX = VIH means CE0X = VIH or CE1X = VIL CEX VCC - 0.2V CEX > VCC - 0.2V means CE0X > VCC - 0.2V or CE1X < 0.2V "X" represents "L" for left port or "R" for right port. 6 . Industrial temperature: for specific speeds, packages and powers contact your sales office.
4858 tbl 09
6.42 5
Others parts begin by 70
70-1 70-2 70-3
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