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Part: 74FCT16374T
Category:
Logic
Description: 16-Bit Register (3-State)
Company: Integrated Device Technology, Inc.
Datasheet: Download 74FCT16374T datasheet File size : 180 kB
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IDT54/74FCT16374AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS 16-BIT REGISTER (3-STATE)
IDT54/74FCT16374AT/CT/ET
.EATURES:
· · · · · · · · · · 0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 5V ±10% High drive outputs (32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C Available in the following packages: Industrial: SSOP, TSSOP, TVSOP Military: CERPACK
DESCRIPTION:
The FCT16374T 16-bit edge-triggered D-type register is built using advanced dual metal CMOS technology. These high-speed, low-power registers are ideal for use as buffer registers for data synchronization and storage. The Output Enable (xOE) and clock (xCLK) controls are organized to operate each device as two 8-bit registers or one 16-bit register with common clock. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16374T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.
.UNCTIONAL BLOCK DIAGRAM
1O E
2O E
1C LK
2C LK
1D 1
D
1O 1
2D1
D
2O1
C
C
T O SEVEN OTHE R CHANNELS
T O SEVEN OTHE R CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
© 2000 Integrated Device Technology, Inc.
MARCH 2002
DSC-5452/2
IDT54/74FCT16374AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
PIN CON.IGURATION
1OE 1O 1 1O 2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max 0.5 to 7 0.5 to VCC+0.5 65 to +150 60 to +120 Unit V V °C mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1CLK 1D 1 1D 2
VTERM(2) TSTG IOUT
VTERM(3) Terminal Voltage with Respect to GND
GND
1O 3 1O 4
GND
1D 3 1D 4
VCC
1O 5 1O 6
VCC
1D 5 1D 6
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . All device terminals except FCT162XXX Output and I/O terminals. 3 . Outputs and I/O terminals for FCT162XXX.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol CI N COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF
GND
1O 7 1O 8 2O 1 2O 2
GND
1D 7 1D 8 2D 1 2D 2
NOTE: 1 . This parameter is measured at characterization but not tested.
GND
2O 3 2O 4
GND
2D 3 2D 4
PIN DESCRIPTION
Pin Names xDx xCLK xOx xOE Data Inputs Clock Inputs 3-State Outputs 3-State Output Enable Input (Active LOW) Description
VCC
2O 5 2O 6
VCC
2D 5 2D 6
GND
2O 7 2O 8 2OE
GND
2D 7 2D 8
.UNCTION TABLE(1)
Inputs Function xDx X X L H L H
NOTE: 1 . H = HIGH voltage level L = LOW voltage level X = Don't care Z = High-impedance = LOW-to-HIGH transition
Outputs xOE H H L L H H xOx Z Z L H Z Z
xCLK L H
2CLK
Z Load Register
SSOP/ TSSOP/ TVSOP/ CERPACK TOP VIEW
2
IDT54/74FCT16374AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = 40°C to +85°C, VCC = 5.0V ±10%; Military: TA = 55°C to +125°C, VCC = 5.0V ±10%
Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max VIN = GND or VCC VCC = Min., IIN = 18mA VCC = Max., VO = GND(3) -- VCC = Max. VO = 2.7V VO = 0.5V VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Min. 2 -- -- -- -- -- -- -- -- 80 -- -- Typ.(2) -- -- -- -- -- -- -- -- 0.7 140 100 5 Max. -- 0.8 ±1 ±1 ±1 ±1 ±1 ±1 1.2 250 -- 500 V mA mV µA µA Unit V V µA
OUTPUT DRIVE CHARACTERISTICS
Symbol IO VOH Parameter Output Drive Current Output HIGH Voltage VCC = Max., VO = VCC = Min. VIN = VIH or VIL Test Conditions(1) 2.5V(3) IOH = 3mA IOH = 12mA MIL IOH = 15mA IND IOH = 24mA MIL IOL = 32mA IND(4) VOL IOFF Output LOW Voltage Input/Output Power Off Leakage(5) VCC = Min. VIN = VIH or VIL VCC = 0V, VIN = or VO 4.5V IOL = 48mA MIL IOL = 64mA IND -- -- ±1 µA -- 0.2 0.55 V 2 3 -- V Min. 50 2.5 2.4 Typ.(2) -- 3.5 3.5 Max. 180 -- -- Unit mA V V
NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4 . Duration of the condition can not exceed one second. 5 . This test limit for this parameter is ±5µA at TA = 55°C.
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IDT54/74FCT16374AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open xOE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle xOE = GND fi = 5MHz 50% Duty Cycle One Bit Toggling VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle xOE = GND Sixteen Bits Toggling fi = 2.5MHz 50% Duty Cycle VIN = VCC VIN = GND Min. -- -- Typ.(2) 0.5 60 Max. 1.5 100 Unit mA µA/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.6
1.5
mA
VIN = 3.4V VIN = GND
--
1.1
3
VIN = VCC VIN = GND
--
3
5.5(5)
VIN = 3.4V VIN = GND
--
7.5
19(5)
NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4 . This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5 . Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6 . IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
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IDT54/74FCT16374AT/CT/ET FAST CMOS 16-BIT REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT16374AT Ind. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) Parameter Propagation Delay xCLK to xOx Output Enable Time Output Disable Time Set-up Time HIGH or LOW, xDx to xCLK Hold Time HIGH or LOW, xDx to xCLK xCLK Pulse Width HIGH or LOW Output Skew(3) Condition(2) CL = 50pF RL = 500 Min.(2) 2 1.5 1.5 2 1.5 5 -- Max. 6.5 6.5 5.5 -- -- -- 0.5 Min.(2) 2 1.5 1.5 2 1.5 6 -- Mil. Max. 7.2 7.5 6.5 -- -- -- 0.5 Unit ns ns ns ns ns ns ns
FCT16374CT Ind. Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) Parameter Propagation Delay xCLK to xOx Output Enable Time Output Disable Time Set-up Time HIGH or LOW, xDx to xCLK Hold Time HIGH or LOW, xDx to xCLK xCLK Pulse Width HIGH or LOW Output Skew(3) Condition(2) CL = 50pF RL = 500 Min.(2) 2 1.5 1.5 2 1.5 5 -- Max. 5.2 5.5 5 -- -- -- 0.5 2 1.5 1.5 2 1.5 6 -- Mil. Min.(2) Max. 6.2 6.2 5.7 -- -- -- 0.5 1.5 1.5 1.5 1.5 0 3(4) -- Ind. Min.(2)
FCT16374ET Max. 3.7 4.4 3.6 -- -- -- 0.5 Min.(2) Mil. Max. -- -- -- -- -- -- -- -- -- -- -- -- -- -- Unit ns ns ns ns ns ns ns
NOTES: 1 . See test circuit and waveforms. 2 . Minimum limits are guaranteed but not tested on Propagation Delays. 3 . Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 4 . This limit is guaranteed but not tested.
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