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Part: 74FCT166244T
Category:
Logic
Description: 16-BIT Buffer/line Driver
Company: Integrated Device Technology, Inc.
Datasheet: Download 74FCT166244T datasheet File size : 180 kB
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Datasheet text preview:
IDT74FCT166244AT/CT FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT BUFFER/LINE DRIVER
IDT74FCT166244AT/CT
FEATURES:
· · · · · · ·
DESCRIPTION:
0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1µA (max.) Light drive balanced output of ±8mA Minimal system switching noise Typical VOLP (Output Ground Bounce) < 0.25V at VCC = 5V, TA = 25°C · Power off disable outputs permit "live insertion" · Available in SSOP and TSSOP packages
The FCT166244T 16-Bit Buffer/Line Driver is for bus interface or signal buffering applications requiring high speed and low power dissipation. These devices have a flow through pin organization, and shrink packaging to simplify board layout. All inputs are designed with hysteresis for improved noise margin. The three-state controls allow independent 4-bit, 8-bit or combined 16bit operation. These parts are plug in replacements for ABT16244 where higher speed, lower noise or lower power dissipation levels are desired. The FCT166244T is suited for very low noise, point-to-point driving where there is a single receiver, or a very light lumped load (<100pF). The buffers are designed to limit the output current to levels which will avoid noise and ringing on the signal lines without using external series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
1O E 1Y 1 3O E
1A 1 1A 2
3A 1 3A 2
3Y 1 3Y 2
1Y 2
1A 3 1A 4
1Y 3
3A 3
3Y 3 3Y 4
1Y 4
3A 4
2O E 2Y 1
4O E
2A 1 2A 2 2A 3
4A 1 4A 2 4A 3
4Y 1 4Y 2 4Y 3
2Y 2 2Y 3 2Y 4
2A 4
4A 4
4Y 4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
2002 Integrated Device Technology, Inc.
JUNE 2002
1
DSC-5462/2
IDT74FCT166244AT/CT FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1O E 1Y 1 1Y 2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max 0.5 to +7 0.5 to VCC+0.5 65 to +150 60 to +120 Unit V V °C mA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
2O E 1A 1 1A 2
VTERM(2) TSTG IOUT
VTERM(3) Terminal Voltage with Respect to GND
GND
1Y 3 1Y 4
GND
1A 3 1A 4
VCC
2Y 1 2Y 2
VCC
2A 1 2A 2
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . All device terminals except FCT162XXX Output and I/O terminals. 3 . Output and I/O terminals for FCT162XXX.
GND
2Y 3 2Y 4 3Y 1 3Y 2
GND
2A 3 2A 4 3A 1 3A 2
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol CI N CO U T Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF
NOTE: 1 . This parameter is measured at characterization but not tested.
GND
3Y 3 3Y 4
GND
3A 3 3A 4
PIN DESCRIPTION
Pin Names xOE xAx xYx Description 3-State Output Enable Inputs (Active LOW) Data Inputs 3-State Outputs
VCC
4Y 1 4Y 2
VCC
4A 1 4A 2
GND
4Y 3 4Y 4 4O E
GND
4A 3 4A 4 3O E
FUNCTION TABLE(1)
Inputs xOE L L H
NOTE: 1 . H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance
SSOP/ TSSOP TOP VIEW
xAx L H X
Outputs xYx L H Z
2
IDT74FCT166244AT/CT FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = 40°C to +85°C, VCC = 5.0V ±10%
Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC VCC = Min., IIN = 18mA VCC = Max., VO = GND(3) -- VCC = Max. VO = 2.7V VO = 0.5V VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Min. 2 -- -- -- -- -- -- -- -- 80 -- -- Typ.(2) -- -- -- -- -- -- -- -- 0.7 140 100 5 Max. -- 0.8 ±1 ±1 ±1 ±1 ±1 ±1 1.2 250 -- 500 V mA mV µA µA Unit V V µA
OUTPUT DRIVE CHARACTERISTICS
Symbol IODL IODL VOH VOH Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. IOH = 8mA VIN = VIH or VIL VCC = Min. IOL = 8mA VIN = VIH or VIL Min. 16 16 2.4 -- Typ.(2) 48 48 3.3 0.3 Max. 96 96 -- 0.55 Unit mA mA V V
NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4 . Duration of the condition can not exceed one second. 5 . The test limit for this parameter is ±5µA at TA = -55°C.
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IDT74FCT166244AT/CT FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open xOE = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (CLKBA) 50% Duty Cycle xOE = GND One Bit Toggling VCC = Max., Outputs Open fi = 2.5MHz 50% Duty Cycle xOE = GND Sixteen Bits Toggling Min. -- -- Typ.(2) 0.5 60 Max. 1.5 100 Unit mA µA/ MHz
VIN = VCC VIN = GND
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
0.6
1.5
mA
--
0.9
2.3
--
2.4
4.5(5)
--
6.4
16.5(5)
NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4 . This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5 . Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6 . IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
74FCT166244AT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay xAx to xYx Output Enable Time Output Disable Time Output Skew(3) Condition(1) CL = 50pF RL = 500 Min.(2) 1.5 1.5 1.5 -- Max. 4.8 6.2 5.6 0.5 74FCT166422CT Min.(2) 1.5 1.5 1.5 -- Max. 4.1 5.8 5.2 0.5 Unit ns ns ns ns
NOTES: 1 . See test circuits and waveforms. 2 . Minimum limits are guaranteed but not tested on Propagation Delays. 3 . Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4
IDT74FCT166244AT/CT FAST CMOS 16-BIT BUFFER/LINE DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC 500 V IN P u ls e G e n e ra to r D . U .T . 50pF RT CL 500 V OUT 7 .0 V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
D ATA IN P U T tS U T I M IN G INPUT A S Y N C H R O N O U S CONTROL PRES ET CLEA R ETC . S Y N C H R O N O U S CONTROL PRES ET CLEA R C L O C K ENABLE ETC . tR E M
tH
3V 1 .5 V 0V 3V 1 .5 V 0V 3V 1 .5 V 0V 3V 1 .5 V 0V
L O W - H IG H - L O W PU LS E tW H I G H - L O W - H IG H PU LS E
1 .5 V
1 .5 V
tS U
tH
Pulse Width
Set-up, Hold, and Release Times
ENABLE S A M E PHASE I N P U T TRANSITION tP L H OU TPU T tP L H O P P O S IT E P H A S E I N P U T TRANSITION tP H L tP H L 3V 1 .5 V 0V VOH 1 .5 V VOL 3V 1 .5 V 0V D IS A B L E 3V CONTROL IN P U T tP Z L O UTPU T NO RM ALLY LOW S W IT C H C LO SE D tP ZH O UTPU T NO RM ALLY H IG H S W IT C H O PEN 3 .5 V 1 .5 V 0 .3 V tP H Z 0 .3 V 1 .5 V 0V 0V VOH tP LZ 1 .5 V 0V 3 .5 V VOL
Propagation Delay
Enable and Disable Times
NOTES: 1 . Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2 . Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
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