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Details, datasheet, quote on part number:74FCT16952T
 
 
Part:74FCT16952T
Category:Logic
Description:16-Bit Registered Transceiver
Company:Integrated Device Technology, Inc.
Datasheet:Download 74FCT16952T datasheet   File size : 68 kB
Request For quote:  Find where to buy 74FCT16952T
 



Datasheet text preview:
IDT74FCT16925AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER

INDUSTRIAL TEMPERATURE RANGE

FAST CMOS 16-BIT REGISTERED TRANSCEIVER
FEATURES:
· · · · · · ·

IDT74FCT16952AT/CT/ET

0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1µA (max.) High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C · Available in SSOP and TSSOP packages

DESCRIPTION:

The FCT16952T 16-bit registered transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be low to enter data from the A port. xCLKAB controls the clocking function. When xCLKAB toggles from low-to-high, the data present on the A port will be clocked into the register. xOEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. The FCT16952T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability allowing "live insertion" of boards when used as backplane drivers.

FUNCTIONAL BLOCK DIAGRAM

54

31

1C E B A
55

2C E B A
30

1C L K B A
1

2CLKBA
28

1OE AB
3

2OE AB
26

1C E A B
2

2C E A B
27

1C L K A B
56

2CLKAB
29

1OE BA
5

2OE BA C CE D
15 52

1A1

2A1 1B1

C CE D

42

2B 1

C CE D

C CE D

T O SEVEN OTHER CHANNELS

T O SEVEN OTHER CHANNELS

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE
2002 Integrated Device Technology, Inc.

1

JUNE 2002
DSC-5442/2

IDT74FCT16925AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER

INDUSTRIAL TEMPERATURE RANGE

PIN CONFIGURATION
1O EAB 1C LK A B 1C E A B

ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max ­0.5 to +7 ­0.5 to VCC+0.5 ­65 to +150 ­60 to +120 Unit V V °C mA
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1O E B A 1C L K B A 1C E B A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

VTERM(2) TSTG

VTERM(3) Terminal Voltage with Respect to GND IOUT

GND
1A 1 1A 2

GND
1B 1 1B 2

VCC
1A 3 1A 4 1A 5

VCC
1B 3 1B 4 1B 5

NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2 . All device terminals except FCT162XXX Output and I/O terminals. 3 . Output and I/O terminals for FCT162XXX.

GND
1A 6 1A 7 1A 8 2A 1 2A 2 2A 3

GND
1B 6 1B 7 1B 8 2B 1 2B 2 2B 3

CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol CI N CO U T Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF

NOTE: 1 . This parameter is measured at characterization but not tested.

GND
2A 4 2A 5 2A 6

GND
2B 4 2B 5 2B 6

FUNCTION TABLE(1,3)
Inputs xCEAB H X L L X xCLKAB X L X xOEAB L L L L H xAx X X L H X

Outputs xBx B(2) B(2) L H Z

VCC
2A 7 2A 8

VCC
2B 7 2B 8

GND
2C E A B 2C LK A B 2O EAB

GND
2C E B A 2C L K B A 2O E B A

SSOP/ TSSOP TOP VIEW

PIN DESCRIPTION
Pin Names xOEAB xOEBA xCEAB xCEBA xCLKAB xCLKBA xAx xBx Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs

NOTES: 1 . A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and xOEBA. 2 . Level of B before the indicated steady-state input conditions were established. 3 . H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition Z = High-impedance

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IDT74FCT16925AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER

INDUSTRIAL TEMPERATURE RANGE

DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = ­40°C to +85°C, VCC = 5.0V ±10%
Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC VCC = Min., IIN = ­18mA VCC = Max., VO = GND(3) -- VCC = Max. VO = 2.7V VO = 0.5V VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Min. 2 -- -- -- -- -- -- -- -- ­80 -- -- Typ.(2) -- -- -- -- -- -- -- -- ­0.7 ­140 100 5 Max. -- 0.8 ±1 ±1 ±1 ±1 ±1 ±1 ­1.2 ­250 -- 500 V mA mV µA µA Unit V V µA

OUTPUT DRIVE CHARACTERISTICS
Symbol IO VOH Parameter Output Drive Current Output HIGH Voltage VCC = Max., VO = VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL VCC = 0V, VIN or VO 4.5V Test Conditions(1) 2.5V(3) IOH = ­3mA IOH = ­15mA IOH = ­32mA(4) IOL = 64mA Min. ­50 2.5 2.4 2 -- -- Typ.(2) -- 3.5 3.5 3 0.2 -- Max. ­180 -- -- -- 0.55 ±1 Unit mA V V µA

VOH IOFF

Output LOW Voltage Input/Output Power Off Leakage(5)

NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4 . Duration of the condition can not exceed one second. 5 . The test limit for this parameter is ±5µA at TA = -55°C.

3

IDT74FCT16925AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER

INDUSTRIAL TEMPERATURE RANGE

POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max., Outputs Open xOEAB = xOEBA = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC fi = 5MHz 50% Duty Cycle One Bit Toggling VCC = Max., Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC fi = 2.5MHz 50% Duty Cycle Sixteen Bits Toggling Min. -- -- Typ.(2) 0.5 75 Max. 1.5 120 Unit mA µA/ MHz

VIN = VCC VIN = GND

IC

Total Power Supply Current(6)

VIN = VCC VIN = GND

--

0.8

1.7

mA

VIN = 3.4V VIN = GND

--

1.3

3.2

VIN = VCC VIN = GND

--

3.8

6.5(5)

VIN = 3.4V VIN = GND

--

8.3

20(5)

NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient. 3 . Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4 . This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5 . Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6 . IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi

4

IDT74FCT16925AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER

INDUSTRIAL TEMPERATURE RANGE

SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
FCT16952AT FCT16952CT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tSU tH tW tSK(o) Parameter Propagation Delay xCLKAB, xCLKBA to xBx, xAx Output EnableTime xOEBA, xOEAB to xAx, xBx Output Disable Time xOEBA, xOEAB to xAx, xBx Set-up Time, HIGH or LOW xAx, xBx to xCLKAB, xCLKBA Hold Time, HIGH or LOW xAx, xBx to xCLKAB, xCLKBA Set-up Time, HIGH or LOW xCEBA, xCEAB, to xCLKAB, xCLKBA Hold Time, HIGH or LOW xCEBA, xCEAB, to xCLKAB, xCLKBA Pulse Width HIGH or LOW, xCLKAB or xCLKBA (3) Output Skew(4) 3 -- -- 0.5 3 -- -- 0.5 3 -- -- 0.5 ns ns 2 -- 2 -- 0 -- ns 3 -- 3 -- 2 -- ns 2 -- 1.5 -- 0 -- ns Condition(1) CL = 50pF RL = 500 Min.(2) 2 1.5 1.5 2.5 Max. 10 10.5 10 -- M i n. ( 2 ) 2 1.5 1.5 2.5 6.3 7 6.5 -- FCT16952ET Max. 3.7 4.4 3.6 -- Unit ns ns ns ns 1.5 1.5 1.5 1.5 Max. Min.(2)

NOTES: 1 . See test circuit and waveforms. 2 . Minimum limits are guaranteed but not tested on Propagation Delays. 3 . This limit is guaranteed but not tested. 4 . Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

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