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Details, datasheet, quote on part number:821054
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Datasheet text preview:
QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE FEATURES
· · · · 4-channel CODEC with on-chip digital filters Software selectable A/µ-law, linear code conversion Meets ITU-T G.711 - G.714 requirements Programmable digital filters adapting to system demands: - AC impedance matching - Transhybrid balance - Frequency response correction - Gain setting Supports two programmable PCM buses Flexible PCM interface with up to 128 programmable time slots, data rate from 512 kbits/s to 8.192 Mbits/s MPI control interface Broadcast mode for coefficient setting 7 SLIC signaling pins (including 2 debounced pins) per channel Fast hardware ring trip mechanism
IDT821054
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· 2 programmable tone generators per channel for testing, ringing and DTMF generation · 1 programmable FSK generator for sending Caller-ID messages · Two programmable chopper clocks · Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048 MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or 8.192 MHz · Advanced test capabilities: - 3 analog loopback tests - 5 digital loopback tests - Level metering function · High analog driving capability (300 AC) · TTL/CMOS compatible digital I/O · CODEC identification · +5 V single power supply · Low power consumption · Operating temperature range: -40°C to +85°C · Package available: 64 Pin PQFP
FUNCTIONAL BLOCK DIAGRAM
CH1
VIN1 VOUT1 2 Inputs 3 I/Os 2 Outputs Filter and A/D D/A and Filter
CH3
Filter and A/D D/A and Filter VIN3 VOUT3 2 Inputs 3 I/Os 2 Outputs
DSP Core
SLIC Signaling
SLIC Signaling
CH2
MCLK CHCLK1 CHCLK2
CH4
DR1 DR2 DX1 DX2
PLL and Clock Generation
General Control Logic
MPI Interface
PCM Interface
RESET INT12 INT34
CCLK
CS
CI
CO
F S B C L K T S X 1 TS X2
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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2003 Integrated Device Technology, Inc.
FEBRUARY 26, 2003
DSC-6035/5
IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
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DESCRIPTIO N
The IDT821054 is a feature rich, single-chip, programmable 4channel PCM CODEC with on-chip filters. Besides the µ-Law/A-Law companding and linear coding/decoding (14 effective bits + 2 extra sign bits), the IDT821054 also provides 1 FSK generator for sending CallerID messages, 2 programmable tone generators per channel (which can generate ring signals) and 2 programmable chopper clocks for SLICs. The digital filters in the IDT821054 provide necessary transmit and receive filtering for voice telephone circuits to interface with time-division multiplexed systems. An integrated programmable DSP realizes AC impedance matching, transhybrid balance, frequency response correction and gain adjustment functions. The IDT821054 supports 2 PCM buses with programmable sampling edge, which allows an extra delay of up to 7 clocks. Once the delay is determined, it is effective to all
four channels of the IDT821054. The device also provides 7 signaling pins per channel for SLICs. The IDT821054 is programmed via a Microprocessor Interface (MPI). Two PCM buses are provided to transfer the compressed or linear PCM data. The device offers strong test capability with several analog/digital loopbacks and level metering function. It brings convenience to system maintenance and diagnosis. A unique feature of "Hardware Ring Trip" is implemented in the IDT821054. When an off-hook signal is detected, the IDT821054 will reverse an output pin to stop the ringing signal immediately. The IDT821054 can be used in digital telecommunication applications such as Central Office Switch, PBX, DLC and Integrated Access Devices (IADs), i.e. VoIP and VoDSL.
PIN CONFIGURATION
SI2_2 SI1_2 SB3_2 SB2_2 SB1_2 SO2_2 SO1_2 SO1_1 SO2_1 SB1_1 SB2_1 SB3_1 SI1_1 SI2_1 INT12 CHCLK1 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
VIN1 GNDA1 VOUT1 VDDA12 VOUT2 GNDA2 VIN2 CNF VDDB VIN3 GNDA3 VOUT3 VDDA34 VOUT4 GNDA4 VIN4
IDT821054 64 Pin PQFP
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
BCLK FS DR2 DX2 TSX2 DR1 DX1 TSX1 VDDD RESET MCLK GNDD CO CI CCLK CS
SI2_3 SI1_3 SB3_3 SB2_3 SB1_3 SO2_3 SO1_3 SO1_4 SO2_4 SB1_4 SB2_4 SB3_4 SI1_4 SI2_4 INT34 CHCLK2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
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TABLE OF CONTENTS
1 2 Pin Description.........7 Functional Description ..... 9 2.1 MPI/PCM Interface ......... 9 2.1.1 Microprocessor Interface (MPI) .......... 9 2.1.2 PCM Bus ......... 10 2.2 DSP Programming........11 2.2.1 Signal Processing.....11 2.2.2 Gain Adjustment.......11 2.2.3 Impedance Matching ......... 11 2.2.4 Transhybrid Balance ......... 12 2.2.5 Frequency Response Correction......12 2.3 SLIC Control ........... 12 2.3.1 SI1 and SI2......12 2.3.2 SB1, SB2 and SB3 ............ 12 2.3.3 SO1 and SO2 ........... 12 2.4 Hardware Ring Trip ...... 12 2.5 Interrupt and Interrupt Enable.........12 2.6 Debounce Filters .......... 13 2.7 Chopper Clock........13 2.8 Dual Tone and Ring Generation.....13 2.9 FSK SIGNAL GENERATION..........14 2.10 Level Metering ........ 15 2.11 Channel Power Down/Standby Mode............16 2.12 Power Down/Suspend Mode .......... 16 Operating The IDT821054 .............. 17 3.1 Programming Description ...... 17 3.1.1 Command Type and Format ............ 17 3.1.2 Addressing the Local Registers........17 3.1.3 Addressing the Global Registers......17 3.1.4 Addressing the Coe-RAM........17 3.1.5 ADDRESSING FSK-RAM........18 3.1.6 Programming Examples .... 18 3.1.6.1 Example of Programming Local Registers ........ 18 3.1.6.2 Example of Programming Global Registers.......18 3.1.6.3 Example of Programming the Coefficient-RAM..........18 3.1.6.4 Example of Programming the FSK-RAM...........19 3.2 Power-on Sequence .............. 21 3.3 Default State After Reset.......21 3.4 Registers Description ............ 22 3.4.1 Registers Overview ........... 22 3.4.2 Global Registers List ......... 24 3.4.3 Local Registers List ........... 31 Absolute Maximum Ratings .......... 35 Recommended DC Operating Conditions ........... 35 Electrical Characteristics .............. 35 6.1 Digital Interface.......35 6.2 Power Dissipation.........35 6.3 Analog Interface ..... 36 Transmission Characteristics ....... 37 7.1 Absolute Gain ......... 37 7.2 Gain Tracking ......... 37 7.3 Frequency Response ............ 37
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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
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Group Delay ........... 38 Distortion ....... 38 Noise ............. 39 Interchannel Crosstalk...........39 Intrachannel Crosstalk...........39
Timing Characteristics ......... 40 8.1 Clock Timing...........40 8.2 Microprocessor Interface Timing .... 41 8.3 PCM Interface Timing............42 Appendix: IDT821054 Coe-RAM Mapping............43
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10 Ordering Information ...... 44
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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
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LIST OF FIGURES
Figure - 1 Figure - 2 Figure - 3 Figure - 4 Figure - 5 Figure - 6 Figure - 7 Figure - 8 Figure - 9 Figure - 10 Figure - 11 Figure - 12 Figure - 13 An Example of the MPI Interface Write Operation ............ 9 An Example of the MPI Interface Read Operation (ID = 81H).... 9 Sampling Edge Selection Waveform....... 10 Signal Flow for Each Channel ........ 11 Debounce Filter ...... 13 General Procedure of Sending Caller-ID Signal.............. 14 A Recommended Procedure of Programming the FSK Generator ......... 15 Clock Timing..... 40 MPI Input Timing ............. 41 MPI Output Timing .......... 41 Transmit and Receive Timing... 42 Typical Frame Sync Timing (2 MHz Operation) .............. 42 Coe-RAM Mapping.......... 43
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