Details, datasheet, quote on part number: IDT54FCT162501CT
PartIDT54FCT162501CT
CategoryLogic => Bus Interface => Bus Oriented Circuits
TitleBus Oriented Circuits
DescriptionFast CMOS 18-bit Registered Transceiver
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT54FCT162501CT datasheet
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Features, Applications

0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1µA (max.) ESD > 2000V per MIL-STD-883, Method > 200V using machine model = 0) Balanced Output Drivers (±24mA) Reduced system switching noise Typical VOLP (Output Ground Bounce) 0.6V at VCC = 25°C Available in SSOP and TSSOP packages

The FCT162501T 18-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power 18-bit registered bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch enable (LEAB and LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A bus data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. OEAB is the output enable for the B port. Data flow from the B port to the A port is similar but requires using OEBA, LEBA and CLKBA. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT162501T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times­reducing the need for external series terminating resistors. The is a plug-in replacement for the FCT16501T and ABT16501 for on-board bus interface applications.

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

Symbol VTERM(2) VTERM(3) TSTG IOUT Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max to +120 Unit °C mA

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Output and I/O terminals for FCT162XXX.

Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 Max. 6 8 Unit pF

NOTE: 1. This parameter is measured at characterization but not tested.

Pin Names OEAB OEBA LEAB LEBA CLKAB CLKBA Ax Bx Description A-to-B Output Enable Input B-to-A Output Enable Input (Active LOW) A-to-B Latch Enable Input B-to-A Latch Enable Input A-to-B Clock Input B-to-A Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs

NOTES: 1. A-to-B data flow is shown. B-to-A data flow is and CLKBA. 2. Output level before the indicated steady-state 3. Output level before the indicated steady-state provided that CLKAB was HIGH before LEAB H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-impedance = LOW-to-HIGH Transition

similar but uses OEBA, LEBA, input conditions were established. input conditions were established, went LOW.

Following Conditions Apply Unless Otherwise Specified: Industrial: to +85°C, VCC 5.0V ±10%

Symbol VIH VIL IIH Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) IIL Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) IOZH IOZL VIK IOS VH ICCL ICCH ICCZ High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC = Min., IIN = ­18mA VCC = Max., = GND(3) VCC = Max. VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Min. ­80 Typ.(2) Max. mV µA Unit V µA

Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VO = VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL

NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC 5.0V, +25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter = ­55°C.


 

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