|Category||Logic => Bus Interface => Bus Oriented Circuits|
|Title||Bus Oriented Circuits|
|Description||Fast CMOS 16-bit Bus Transceiver/register|
|Company||Integrated Device Technology, Inc.|
|Datasheet||Download IDT54FCT16652AT datasheet
MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1µ A (max.) ESD > 2000V per MIL-STD-883, Method > 200V using machine model = 0) VCC 5V ±10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) 1.0V at VCC = 25°C Available in the following packages: Industrial: SSOP, TSSOP, TVSOP Military: CERPACK
The FCT16652T 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the xOEAB and xOEBA signals control the transceiver functions. The xSAB and xSBA control pins are provided to select either real time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real time data. A low input level selects real-time data and a high level selects stored data. Data on the or B data bus, or both, can be stored in the internal D-flipflops by low-to-high transitions at the appropriate clock pins (xCLKAB or xCLKBA), regardless of the select or enable control pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16652T is ideally suited for driving high capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.
Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Output and I/O terminals for FCT162XXX.
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. 6 8 Unit pFNOTE: 1. This parameter is measured at characterization but not tested.
Pin Names xAx xBx xCLKAB, xCLKBA xSAB, xSBA xOEAB, xOEBA Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs
Inputs xOEAB xOEBA xCLKAB or L xCLKBA or L xSAB X X(2) xSBA X(2) xAx Input Unspecified(1) Output Input Output Data I/O(1) xBx Input Unspecified(1) Output Input Output Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in both Registers Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus Operation or Function
NOTES: 1. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clocks inputs. 2. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. H = HIGH Voltage Level L = LOW Voltage Level X = Don't care = LOW-to-HIGH Transition
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