Details, datasheet, quote on part number: IDT54FCT16652ETEB
CategoryLogic => Transceivers => 16/32-Bit Bus Transceiver->CMOS/BiCMOS->FCT/FCT-T
Title16/32-Bit Bus Transceiver->CMOS/BiCMOS->FCT/FCT-T
DescriptionFast CMOS 16-bit Bus Transceiver/register
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT54FCT16652ETEB datasheet
Find where to buy


Features, Applications

MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1 A (max.) ESD > 2000V per MIL-STD-883, Method > 200V using machine model 0) 25 mil pitch SSOP, 19.6 mil pitch TSSOP,15.7 mil pitch TVSOP and 25 mil pitch CERPACK packages Extended commercial range to +85C VCC 5V 10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) 1.0V at VCC = 25C

The FCT16652T/AT/CT/ET 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, lowpower devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the xOEAB and xOEBA signals control the transceiver functions. The xSAB and xSBA control pins are provided to select either real time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between stored and real time data. A low input level selects real-time data and a high level selects stored data. Data on the or B data bus, or both, can be stored in the internal D-flipflops by low-to-high transitions at the appropriate clock pins (xCLKAB or xCLKBA), regardless of the select or enable control pins. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16652T/AT/CT/ET is ideally suited for driving high capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT.

Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. 6 8 Unit pF

NOTE: 1. This parameter is measured at characterization but not tested.

Pin Names xAx xBx xCLKAB, xCLKBA xSAB, xSBA xOEAB, xOEBA Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source Select Inputs Output Enable Inputs

Inputs xOEAB xOEBA xCLKAB or L xCLKBA or L xSAB X X(2) xSBA X(2) xAx Input Unspecified(1) Output Input Output Data I/O(1) xBx Input Unspecified(1) Output Input Output Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in both Registers Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus Operation or Function

NOTES: 1. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clocks inputs. 2. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. H = HIGH Voltage Level L = LOW Voltage Level X = Don't care = LOW-to-HIGH Transition


Related products with the same datasheet
Some Part number from the same manufacture Integrated Device Technology, Inc.
IDT54FCT16652ETPA Fast CMOS 16-bit Bus Transceiver/register
IDT54FCT166H244ATE Fast CMOS 16-bit Buffer/line Driver
IDT54FCT166H245ATE Fast CMOS 16-bit Bidirectional Transceivers
IDT54FCT16823 Fast CMOS 18-bit Register

723676 : 8K X 36 X 2 Triple-bus Fifo, 5.0V

IDT7201LA25TD : CMOS Asynchronous Fifo 256 X 9, 512 X 9, 1k X 9

IDT70T3319S200BCI : High-speed 2.5V 256/128k x 72 Synchronous Dual-port Static RAM WITH 3.3V OR 2.5V Interface

IDT70T3599S-133DRI : High-speed 2.5V 256/128k x 72 Synchronous Dual-port Static RAM WITH 3.3V OR 2.5V Interface

IDT7016L35JGB : High-speed 16K X 9 Dual-port Static RAM

IDTAMB0780L4RJ8 : Interface - Signal Buffers, Repeaters, Splitter Integrated Circuit (ics); IC MEMORY BUFFER ADV DIMM 655BGA Specifications: Lead Free Status: Contains Lead ; RoHS Status: RoHS Non-Compliant

IDT70V06L55JG : 16K X 8 DUAL-PORT SRAM, 15 ns, CPGA68 Specifications: Memory Category: SRAM Chip ; Density: 131 kbits ; Number of Words: 16 k ; Bits per Word: 8 bits ; Package Type: CERAMIC, PGA-68 ; Pins: 68 ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Access Time: 15 ns ; Operating Temperature: 0 to 70 C (32 to 158 F)

IDT70V3319S166BFGI : 256K X 18 DUAL-PORT SRAM, 4.2 ns, CBGA256 Specifications: Memory Category: SRAM Chip ; Density: 4719 kbits ; Number of Words: 256 k ; Bits per Word: 18 bits ; Package Type: BGA, 17 X 17 MM X 1.4 MM, 1 MM PITCH, GREEN, BGA-256 ; Pins: 256 ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Access Time: 4.2 ns ; Operating Temperature: 0 to 70 C (32

IDT72V3614L15PF : 64K X 36 OTHER FIFO, 6.5 ns, PQFP128 Specifications: Memory Category: FIFO ; Density: 2359 kbits ; Number of Words: 64 k ; Bits per Word: 36 bits ; Package Type: TQFP, PLASTIC, TQFP-128 ; Pins: 128 ; Logic Family: CMOS ; Supply Voltage: 3.3V ; Access Time: 6.5 ns ; Cycle Time: 10 ns ; Operating Temperature: 0 to 70 C (32 to 158 F)

70121L45J : 2K X 9 DUAL-PORT SRAM, 45 ns, PQCC52 Specifications: Memory Category: SRAM Chip ; Density: 18 kbits ; Number of Words: 2 k ; Bits per Word: 9 bits ; Package Type: 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-52 ; Pins: 52 ; Logic Family: CMOS ; Supply Voltage: 5V ; Access Time: 45 ns ; Operating Temperature: 0 to 70 C (32 to 158

0-C     D-L     M-R     S-Z