Details, datasheet, quote on part number: IDT54FCT16823ETPA
CategoryLogic => Bus Interface => Bus Oriented Circuits
TitleBus Oriented Circuits
DescriptionFast CMOS 18-bit Register
CompanyIntegrated Device Technology, Inc.
DatasheetDownload IDT54FCT16823ETPA datasheet
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Features, Applications

0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) VCC 10% High drive outputs (-32mA IOH, 64mA IOL) Power off disable outputs permit "live insertion" Typical VOLP (Output Ground Bounce) 1.0V at VCC = 25C Available in SSOP and TSSOP packages

The FCT16823T 18-bit bus interface registers are built using advanced, dual metal CMOS technology. These high-speed, low-power registers with clock enable (xCLKEN) and clear (xCLR) controls are ideal for parity bus interfacing in high-performance synchronous systems. The control inputs are organized to operate the device as two 9-bit registers or one 18-bit register. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16823T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers.

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Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max to +120 Unit C mA

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Output and I/O terminals for FCT162XXX.

Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 Max. 6 8 Unit pF

NOTE: 1. This parameter is measured at characterization but not tested.

Pin Names xDx xCLK xCLKEN xCLR x OE xQx Description Data Inputs Clock Inputs Clock Enable Inputs (Active LOW) Asynchronous Clear Inputs (Active LOW) Output Enable Inputs (Active LOW) 3-State Outputs

xOE xCLR Inputs xCLKEN xCLK X xDx Outputs xQx L Q(2) Function High Z Clear Hold Load

NOTES: H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance 2. Output level before indicated steady-state input conditions were established.

Following Conditions Apply Unless Otherwise Specified: Industrial: to +85C, VCC 5.0V 10%

Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Parameter Input HIGH Level Input LOW Level Input HIGH Current (Input pins)(5) Input HIGH Current (I/O pins)(5) Input LOW Current (Input pins)(5) Input LOW Current (I/O pins)(5) High Impedance Output Current (3-State Output pins)(5) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC = Min., IIN = 18mA VCC = Max., = GND(3) VCC = Max. VI = GND Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC Min. 80 Typ.(2) Max. mV A Unit V A

Symbol IO VOH Parameter Output Drive Current Output HIGH Voltage VCC = Min. VIN = VIH or VIL VOL IOFF Output LOW Voltage Input/Output Power Off Leakage(5) VCC = Min. VIN = VIH or VIL VCC = 0V, VIN 1 A

NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. This test limit for this parameter = 55C.


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