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Part: IDT5962-8753103TA
Category:
Memory
-> FIFO
Description: 512 X 9 Asyncfifo, 5.0V
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT5962-8753103TA datasheet File size : 239 kB
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Datasheet text preview:
CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9 and 1,024 x 9
IDT7200L IDT7201LA IDT7202LA
FEATURES:
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DESCRIPTION:
The IDT7200/7201/7202 are dual-port memories that load and empty data on a first-in/first-out basis. The devices use Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and depth. The reads and writes are internally sequential through the use of ring pointers, with no address information required to load and unload data. Data is toggled in and out of the devices through the use of the Write (W) and Read (R) pins. The devices utilize a 9-bit wide data array to allow for control and parity bits at the user's option. This feature is especially useful in data communications applications where it is necessary to use a parity bit for transmission/reception error checking. It also features a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW to allow for retransmission from the beginning of data. A Half-Full Flag is available in the single device mode and width expansion modes. These FIFOs are fabricated using IDT's high-speed CMOS technology. They are designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B.
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First-In/First-Out dual-port memory 256 x 9 organization (IDT7200) 512 x 9 organization (IDT7201) 1,024 x 9 organization (IDT7202) Low power consumption -- Active: 440mW (max.) --Power-down: 28mW (max.) Ultra high speed--12ns access time Asynchronous and simultaneous read and write Fully expandable by both word depth and/or bit width Pin and functionally compatible with 720X family Status Flags: Empty, Half-Full, Full Auto-retransmit capability High-performance CEMOSTM technology Military product compliant to MIL-STD-883, Class B Standard Military Drawing #5962-87531, 5962-89666, 5962-89863 and 5962-89536 are listed on this function Dual versions available in the TSSOP package. For more information, see IDT7280/7281/7282 data sheet IDT7280 = 2 x IDT7200 IDT7281 = 2 x IDT7201 IDT7282 = 2 x IDT7202 Industrial temperature range (40oC to +85oC) is available (plastic packages only)
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS (D0-D8) W WRITE CONTROL WRITE POINTER RAM ARRAY 256 x 9 512 x 9 1,024 x 9
READ POINTER
R
READ CONTROL
THREESTATE BUFFERS DATA OUTPUTS (Q0-Q8)
RS RESET LOGIC FL/RT
FLAG LOGIC EXPANSION LOGIC
EF FF
XI
XO/HF
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IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES 1
2002 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
SEPTEMBER 2002
DSC-2679/9
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9 and 1,024 x 9
COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES
D3
D8
W D8 D3 D2 D1 D0 XI FF Q0 Q1 Q2 Q3 Q8 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC D4 D5 D6 D7 FL/RT RS EF XO/HF Q7 Q6 Q5 Q4 R
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4 3 2 1 32 31 30 D2 D1 D0 XI FF Q0 Q1 NC Q2 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Q8 GND NC R
D5
INDEX
W NC
VCC D4
PIN CONFIGURATIONS
29 28 27 26 25 24 23 22 21
D6 D7 NC FL/RT RS EF XO/HF Q7 Q6
Q3
Q4
Q5
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Package Type PLASTIC DIP(1) PLASTIC THIN DIP CERDIP(1) THIN CERDIP SOIC
Reference Identifier P28-1 P28-2 D28-1 D28-3 SO28-3 TOP VIEW
Order Code P TP D TD SO
Package Type LCC(1) PLCC
Reference Identifier L32- 1 J32-1 TOP VIEW
Order Code L J
NOTE: 1 . The 600-mil-wide DIP (P28-1 and D28-1) and LCC are not available for the IDT7200.
RECOMMENDED DC OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS
Symbol VTERM Rating Terminal Voltage with Respect to GND Storage Temperature DC Output Current Com'l & Ind'l 0.5 to +7.0 Mil. 0.5 to +7.0 Unit V Symbol VCC GND VIH(1) VIH(1) VIL(2) TA TA TA Parameter Supply Voltage Commercial/Industrial/Military Supply Voltage Input High Voltage Com'l/Ind'l Input High Voltage Military Input Low Voltage Commercial/Industrial/Military Operating Temperature Commercial Operating Temperature Industrial Operating Temperature Military Min. 4.5 0 2.0 2.2 -- 0 40 55 Typ. 5.0 0 -- -- -- -- -- -- Max. Unit 5.5 V 0 -- -- 0.8 70 85 125 V V V V °C °C °C
TSTG IO U T
55 to +125 50 to +50
65 to +155 50 to +50
°C mA
NOTE: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
NOTES: 1 . For RT/RS/XI input, VIH = 2.6V (commercial). For RT/RS/XI input, VIH = 2.8V (military). 2 . 1.5V undershoots are allowed for 10ns once per cycle.
2
IDT7201L/7201LA/7202LA CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9 and 1,024 x 9
COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(Commercial: VCC = 5V ± 10%, TA = 0oC to +70oC; Industrial: VCC = 5V ± 10%, TA = 40oC to +85oC; Military: VCC = 5V ± 10%, TA = 55oC to +125oC)
IDT7200L IDT7201LA IDT7202LA Com'l & Ind'l(1) tA = 12, 15, 20, 25, 35, 50 ns Min. Max. 1 10 2.4 -- -- -- 1 10 -- 0.4 80 5 IDT7200L IDT7201LA IDT7202LA Military(2) tA = 20, 30, 50, 80 ns Min. Max. 10 10 2.4 -- -- -- 10 10 -- 0.4 100 15
Symbol ILI(3) ILO(4) VOH VOL ICC1(5,6,7) ICC2(5,8)
Parameter Input Leakage Current (Any Input) Output Leakage Current Output Logic "1" Voltage IOH = 2mA Output Logic "0" Voltage IOL = 8mA Active Power Supply Current Standby Current (R=W=RS=FL/RT=VIH)
Unit µA µA V V mA mA
NOTES: 1 . Industrial temperature range product for the 15ns and 25 ns speed grades are available as a standard device. 2 . Military speed grades of 50ns and 80ns are only available for the IDT7201LA. 3 . Measurements with 0.4 VIN VCC. 4 . R VIH, 0.4 VOUT VCC. 5 . Tested with outputs open (IOUT = 0). 6 . Tested at f = 20 MHz. 7 . Typical ICC1 = 15 + 2*fS + 0.02*CL*fS (in mA) with VCC = 5V, TA = 25°C, fS = WCLK frequency = RCLK frequency (in MHz, using TTL levels), data switching at fS/2, CL = capacitive load (in pF). 8 . All Inputs = VCC - 0.2V or GND + 0.2V.
CAPACITANCE (TA = +25°C, f = 1.0 MHz)
Symbol C IN C OUT Parameter Input Capacitance Output Capacitance Condition VIN = 0V VOUT = 0V Max. 8 8 Unit pF pF
NOTE: 1 . Characterized values, not currently tested.
5V
1.1K TO OUTPUT PIN 680
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load GND to 3.0V 5ns 1.5V 1.5V See Figure 1
30pF*
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or equivalent circuit
Figure 1. Output Load
* Includes scope and jig capacitances.
3
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