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Part: IDT7006S-35
Category:
Memory
-> SRAM
-> SRAM
Description: Dual-port RAM With Busy, Interrupt, Semaphores, & Master/slave Select: 16kx8
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT7006S-35 datasheet File size : 239 kB
Request For quote: Find where to buy IDT7006S-35
Datasheet text preview:
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
Features
x x
IDT7006S/L
x
x
True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access Military: 20/25/35/55/70ns (max.) Industrial: 55ns (max.) Commercial: 15/17/20/25/35/55ns (max.) Low-power operation IDT7006S Active: 750mW (typ.) Standby: 5mW (typ.) IDT7006L Active: 700mW (typ.) Standby: 1mW (typ.) IDT7006 easily expands data bus width to 16 bits or more using the Master/Slave select when cascading more than
x
x x x
x x
x x x
x
one device M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave Busy and Interrupt Flags On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port Devices are capable of withstanding greater than 2001V electrostatic discharge Battery backup operation2V data retention TTL-compatible, single 5V (±10%) power supply Available in 68-pin PGA, quad flatpack, PLCC, and a 64-pin TQFP Industrial temperature range (40°C to +85°C) is available for selected speeds
Functional Block Diagram
OEL CEL R/WL OER CER R/WR
I/O0L- I/O7L I/O Control BUSYL A13L A0L
(1,2)
I/O0R-I/O7R I/O Control BUSYR(1,2) Address Decoder
14
MEMORY ARRAY
14
Address Decoder
A13R A0R
CEL OEL R/WL
ARBITRATION INTERRUPT SEMAPHORE LOGIC
CER OER R/WR
SEML (2) INTL
NOTES: 1 . (MASTER): BUSY is output; (SLAVE): BUSY is input. 2 . BUSY outputs and INT outputs are non-tri-stated push-pull.
M/S
SEMR INTR(2)
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SEPTEMBER 1999
1
DSC-2739/11
IDT7006S/L High-Speed 16K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
The IDT7006 is a high-speed 16K x 8 Dual-Port Static RAM. The IDT7006 is designed to be used as a stand-alone 128K-bit Dual-Port RAM or as a combination MASTER/SLAVE Dual-Port RAM for 16-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider memory system applications results in full-speed, errorfree operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter
Description
a very low standby power mode. Fabricated using IDTs CMOS high-performance technology, these devices typically operate on only 750mW of power. Low-power (L) versions offer battery backup data retention capability with typical power consumption of 500µW from a 2V battery. The IDT7006 is packaged in a ceramic 68-pin PGA, an 68-pin quad flatpack, a PLCC, and a 64-pin thin quad flatpack, TQFP. Military grade product is manufactured in compliance with the latest revision of MIL-PRF38535 QML, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
Pin Configurations(1,2,3)
INDEX I/O2L I/O3L I/O4L I/O5L GND I/O6L I/O7L VCC GND I/O0R I/O1R I/O2R VCC I/O3R I/O4R I/O5R I/O6R
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
I/O1L I/O0L N/C OEL R/WL SEML CEL N/C A13L VCC A12L A11L A10L A9L A8L A7L A6L
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56
IDT7006J or F J68-1(4) F68-1(4) 68 Pin PLCC / Flatpack Top View(5)
55 54 53 52 51 50 49 48 47 46 45
44 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A5L A4L A3L A2L A1L A0L INTL BUSYL GND M/S BUSYR INTR A0R A1R A2R A3R A4R
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.
R/WL SEML CEL
I/O1L I/O0L
VCC A12L A11L
I/O7R N/C OER R/WR SEMR CER N/C A13R GND A12R A11R A10R A9R A8R A7R A6R A5R
A13L
A10L
OEL
A9L A8L 53 52
A7L
INDEX
61 60
63 62
64
59
58 57
56
54
51 50
55
49
A6L A5L
I/O2L I/O3L I/O4L I/O5L GND I/O6L I/O7L VCC GND I/O0R I/O1R I/O2R VCC I/O3R I/O4R I/O5R
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
48 47 46 45 44
A4L A3L A2L A1L A0L INTL BUSYL GND M/S BUSYR INTR A0R A1R A2R A3R A4R
.
7006PF PN-64(4) 64 Pin TQFP Top View(5)
43 42 41 40 39 38 37 36 35 34
NOTES: 1 . All VCC pins must be connected to power supply. 2 . All GND pins must be connected to ground supply. 3 . J68-1 package body is approximately .95 in x .95 in. x .17 in. F68-1 package body is approximately .97 in x .97 in x .08 in. PN64-1 package body is approximately 14mm x 14mm x 1.4mm. 4 . This package code is used to reference the package diagram. 5 . This text does not indicate orientation of the actual part-marking
17
20
23 24 25
26 27
29 30
18 19
21 22
28
31
32
16
33
A 13R G ND
A9R A8R A7R
SEMR CER
I/O6R
I/O7R OER
R/WR
A12R A11R A10R
A6R A5R
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2
IDT7006S/L High-Speed 16K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Pin Configurations (1,2,3) (con't.)
51 11 53 A7L 55 A9L A5L 52 A6L 54 A8L 50 A4L 49 A3L 48 A2L 47 A1L 46 44 42 A0L BUSYL M/S 40 38 INTR A1R 36 A3R 35 A4R 32 A7R 30 A9R 34 A5R 33 A6R 31 A8R 29 A10R 27 A12R 25 A13R
10
45 43 41 39 37 INTL GND BUSYR A0R A2R
09
08
57 56 A11L A10L 59 58 VCC A12L 61 N/C 60 A13L
07
IDT7006G G68-1(4) 68-Pin PGA Top View(5)
28 A11R 26 GND 24 N/C
06
63 62 05 SEML CEL 04 65 64 OEL R/WL 67 66 I/O0L N/C 1 3 68 I/O1L I/O2L I/O4L 2 01 A INDEX
NOTES: 1 . All VCC pins must be connected to power supply. 2 . All GND pins must be connected to ground supply. 3 . Package body is approximately 1.18 in x 1.18 in x .16 in. 4 . This package code is used to reference the package diagram. 5 . This text does not indicate orientation of the actual part-marking
22 23 SEMR CER 20 OER 5 7 9 11 13 15 GND I/O7L GND I/O1R VCC I/O4R 6 8 10 12 14 16 VCC I/O0R I/O2R I/O3R I/O5R I/O6L D E F G H J 21 R/WR
.
03
02
18 19 I/O7R N/C 17 I/O6R K L
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4 I/O3L I/O5L B C
Pin Names
Left Port C EL R/ WL OEL A0 L - A13L I/O0 L - I/O7L SEML INTL BUSYL C ER R/ WR OER A0R - A13R I/O0R - I/O7R SEMR INTR BUSYR M/ S VCC GND Ri ght Port Chip Enable Read/Write Enable Outp ut Enable Add res s Data Input/Output Semap ho re Enable Interrup t Flag Bus y Flag Master or Slave Select Powe r Ground
2739 tbl 01
Nam es
6.42 3
IDT7006S/L High-Speed 16K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Tr uth Table I: Non-Contention Read/Write Control
Inp uts Outputs
CE
H L L X
R/W X L H X
OE
X X L H
SEM
H H H X
I/O0 -7 Hig h-Z DATA IN DATA OUT Hig h-Z De s e le c te d : Power-Down Write to Memory Re ad Memory Outp uts Disabled
M ode
NOTE: 1 . A0L A13L is not equal to A0R A13R
2739 tbl 02
Tr uth Table II: Semaphore Read/Write Control(1)
Inputs(1) Outputs
CE
H H L
R/ W H X
OE
L X X
SEM
L L L
I/O0-7 DATA OUT DATAIN
____
M ode R e ad in Semaphore Flag Data Out Write I/Oo into Semaphore Flag No t Allowed
2739 tbl 03
NOTE: 1 . There are eight semaphore flags written to via I/O0 and read from I/O0 - I/O7. These eight semaphores are addressed by A0 - A2.
Absolute Maximum Ratings(1)
S ym b o l VTERM(2) Rati ng Te rminal Voltage with Respect to GND Te mp e rature Und e r Bias Sto rag e Te mp e rature DC Output Curre nt Com m ercial & Industrial -0. 5 to +7.0 M i l i tary -0. 5 to +7.0 Uni t V
Recommended DC Operating Conditions
Sym b ol VCC GND VIH V IL Parameter Sup p ly Voltage Gro und Inp ut High Voltage Inp ut Low Voltage M in . 4. 5 0 2. 2 -0.5
(1)
Typ . 5. 0 0
____ ____
M ax. 5. 5 0 6. 0
(2)
Un it V V V V
2739 tbl 06
TBIAS TSTG IO UT
-55 to +125 -55 to +125 50
-65 to +135 -65 to +150 50
o
C C
o
0. 8
mA
2739 tbl 04
NOTES: 1 . VIL > -1.5V for pulse width less than 10ns. 2 . VTERM must not exceed Vcc + 10%.
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec-tions of this specification is not implied. Exposure to absolute maxi-mum rating conditions for extended periods may affect reliability. 2 . VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of VTERM < Vcc + 10%.
Maximum Operating Temperature and Supply Voltage(1,2)
Grade Military Commerc ial Industrial Am bient Tem perature -55 C to+125 C
O O
GND 0V 0V 0V
V cc 5.0V + 10% 5.0V + 10% 5.0V + 10%
Capacitance(1) (TA = +25°C, f = 1.0mhz)
S ym b ol CIN CO UT P aram eter Inp ut Capacitance Outp ut Cap acitance Con di ti on s(2) V IN = 3dV V O UT = 3dV M ax. 9 10 Uni t pF pF
2739 tbl 05
0 C to +70 C
O O
40 C to +85 C
O O
2 7 39 tbl 07 NOTES: 1 . This is the parameter TA. 2 . Industrial temperature: for specific speeds, packages and powers contact your sales office.
NOTES: 1 . These parameters are determined by device characterization, but are not production tested (TQFP Package Only). 2 . 3dV references the interpolated capacitance when the input and output signals switch from 0V to 3V or from 3V to 0V.
4
IDT7006S/L High-Speed 16K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the 0perating Temperature and Supply Voltage Range (VCC = 5.0V ± 10%)
7006S S ym bol |ILI| |ILO| V OL VOH P aram eter Input Leakage Current
(1)
7006L Max. 10 10 0.4
___
Test Conditions VCC = 5.5V, VIN = 0V to VCC C E = VIH, VOUT = 0V to VCC IOL = 4mA IOH = -4mA
Mi n.
___ ___ ___
Mi n.
___ ___ ___
Max. 5 5 0.4
___
Uni t µA µA V V
2739 tbl 08
Output Leakage Current Output Low Voltage Output High Voltage
2.4
2.4
NOTE: 1 . At Vcc < 2.0V input leakages are undefined.
Data Retention Characteristics Over All Temperature Ranges (L Version Only) (VLC = 0.2V, VHC = VCC - 0.2V)
Symbol VDR ICCDR Param eter VCC for Data Retention Data Retention Current VCC = 2V CE > VHC VIN > VHC or VHC Mil. & Ind. Com' l. Test Condition Min. 2.0
___ ___
Typ.
___
(1)
Max.
___
Unit V µA
100 100
___ ___
4000 1500
___ ___
0 tRC(2)
ns ns
2739 tbl 09
NOTES: 1 . TA = +25°C, VCC = 2V, and are not production tested. 2 . tRC = Read Cycle Time 3 . This parameter is guaranteed by characterization, but is not production tested.
Data Retention Waveform
DATA RETENTION MODE VCC 4.5V tCDR CE VIH VDR VDR > 2V 4.5V tR VIH
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