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Part: IDT7132SA20JB
Category:
Description: High-speed 2k X 8 Dual-port Static RAM
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT7132SA20JB datasheet File size : 398 kB
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Datasheet text preview:
HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
Integrated Device Technology, Inc.
IDT7132SA/LA IDT7142SA/LA
FEATURES:
· High-speed access -- Military: 25/35/55/100ns (max.) -- Commercial: 25/35/55/100ns (max.) -- Commercial: 20ns only in PLCC for 7132 · Low-power operation -- IDT7132/42SA Active: 550mW (typ.) Standby: 5mW (typ.) -- IDT7132/42LA Active: 550mW (typ.) Standby: 1mW (typ.) · Fully asynchronous operation from either port · MASTER IDT7132 easily expands data bus width to 16-ormore bits using SLAVE IDT7142 · On-chip port arbitration logic (IDT7132 only) · BUSY output flag on IDT7132; BUSY input on IDT7142 · Battery backup operation --2V data retention · TTL-compatible, single 5V ±10% power supply · Available in popular hermetic and plastic packages · Military product compliant to MIL-STD, Class B · Standard Military Drawing # 5962-87002 · Industrial temperature range (40°C to +85°C) is available, tested to miliary electrical specifications
DESCRIPTION:
The IDT7132/IDT7142 are high-speed 2K x 8 Dual-Port Static RAMs. The IDT7132 is designed to be used as a standalone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the IDT7142 "SLAVE" Dual-Port in 16-bit-ormore word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-or-more-bit memory system applications results in full-speed, error-free operation without the need for additional discrete logic. Both devices provide two independent ports with separate control, address, and l/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature, controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 550mW of power. Low-power (LA) versions offer battery backup data retention capability, with each Dual-Port typically consuming 200µW from a 2V battery. The IDT7132/7142 devices are packaged in a 48-pin sidebraze or plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and 48-lead flatpacks. Military grade product is manufactured in compliance with the latest revision of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
OEL
R/
OER
R/
CEL
WL
CER
WR
I/O0L- I/O7L I/O Control I/O Control
I/O0R-I/O7R
BUSYL
(1,2)
BUSYR
Address Decoder
11
(1,2)
A10L A0L
MEMORY ARRAY
Address Decoder
A10R A0R
NOTES: 1. IDT7132 (MASTER): BUSY is open drain output and requires pullup resistor of 270. IDT7142 (SLAVE): BUSY is input. 2. Open drain output: requires pullup resistor of 270.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
11
CEL
ARBITRATION LOGIC
CER
2692 drw 01
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2692/8
6.02
1
IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
BUSYR
BUSYL
PIN CONFIGURATIONS (1,2)
WR
R/
WL
BUSYL
R/
CEL
A10L
A10R
WL
A10L
BUSYR
BUSYL
WL
WR
2692 drw 02
NOTES: 1. All Vcc pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. This text does not indicate orientation of the actual part-marking.
76 A1L A2L A3L A4L A5L 8 9 10 11 12 13 14 15 16 17 18 19 20
54
32
R/
1
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34
R/
INDEX
N/C
N/C A10R
A10L
VCC
CER
OEL
CEL
A0L
A0L A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L I/O3L I/O4L I/O5L I/O6L I/O7L GND
OEL
1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 IDT7132/ 40 10 7142 39 11 38 12 P48-1 37 & 13 C48-2 36 14 35 15 DIP 34 16 TOP 33 17 VIEW (3) 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25
VCC R/
CER
BUSYR
A10R A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R I/O7R I/O6R I/O5R I/O4R I/O3R I/O2R I/O1R I/O0R
WR
65 A1L A2L A3L A4L A5L A6L A7L A8L A9L I/O0L I/O1L I/O2L 7 8 9 10 11 12 13 14 15 16
43
R/
INDEX
2
1
48 47 46 45 44 43 42 41 40 A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R I/O7R I/O6R
OER
VCC
CEL
CER
IDT7132/42 L48-1 & F48-1 48-PIN LCC/ FLATPACK TOP VIEW (3)
17 32 18 31 19 20 21 22 23 24 25 26 27 28 29 30
I/O3L I/O4L I/O5L I/O6L I/O7L GND I/O0R I/O1R I/O2R I/O3R I/O4R I/O5R
OER
39 38 37 36 35 34 33
2692 drw 03
OEL
A0L
OER
A0R A1R A2R A3R A4R A5R A6R A7R A8R A9R N/C I/O7R
2692 drw 04
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM
(2)
Rating Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature DC Output Current
Commercial -0.5 to +7.0
Military -0.5 to +7.0
Unit V
IDT7132/42 J52-1 52-PIN PLCC TOP VIEW (3)
A6L A7L A8L A9L
TA TBIAS TSTG IOUT
0 to +70 -55 to +125 -55 to +125 50
-55 to +125 -65 to +135 -65 to +150 50
°C °C °C mA
I/O0L I/O1L I/O2L I/O3L
21 22 23 24 25 26 27 28 29 30 31 32 33
I/O5L I/O6L I/O7L N/C
GND I/O0R I/O1R
I/O2R I/O3R I/O4R
I/O5R
2692 tbl 01 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc + 0.5V for more than 25% of the cycle time or 10ns maximum, and is limited to Vcc + 0.5V.
NOTES: 1. All Vcc pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. This text does not indicate orientation of the actual part-marking.
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH V IL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min. Typ. 4.5 5.0 0 0 2.2 -0.5
(1)
I/O6R
I/O4L
RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE
Grade Military Commercial Ambient Temperature -55°C to +125°C 0°C to +70°C GND 0V 0V VCC 5.0V ± 10% 5.0V ± 10%
2692 tbl 02
Max. 5.5 0 6.0(2) 0.8
Unit V V V V
2692 tbl 03
-- --
NOTES: 1. VIL (min.) = -1.5V for pulse width less than 10ns. 2. VTERM must not exceed Vcc + 0.5V.
6.02
2
IDT7132SA/LA AND IDT7142SA/LA HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1,6) (VCC = 5.0V ± 10%)
7132X20(2) 7132X25(3) 7132X35 7132X55 7132X100 7142X25(3) 7142X35 7142X55 7142X100 Typ. Max. Typ. Max. Typ. Max. Typ. Max. Typ. Max. Unit -- -- 110 -- -- 110 110 250 110 110 200 110 -- -- 30 30 -- -- 65 65 -- -- 1.0 0.2 -- -- 60 60 -- -- 65 45 -- -- 165 125 -- -- 15 5 -- -- 155 115 30 30 30 30 65 65 65 65 1.0 0.2 1.0 0.2 60 60 60 60 280 220 220 170 80 60 65 45 160 125 150 115 30 10 15 5 155 115 145 105 80 80 80 80 25 25 25 25 50 50 50 50 1.0 0.2 1.0 0.2 45 45 45 45 230 170 165 120 80 60 65 45 150 115 125 90 30 10 15 4 145 105 110 85 65 65 65 65 20 20 20 20 190 140 155 110 65 45 65 35 65 65 65 65 20 20 20 20 40 40 40 40 1.0 0.2 1.0 0.2 40 40 40 40 190 140 155 110 65 45 55 35 125 90 110 75 30 10 15 4 110 80 95 70 mA
Symbol ICC
Parameter Dynamic Operating Current (Both Ports Active) Standby Current (Both Ports - TTL Level Inputs) Standby Current (One Port - TTL Level Inputs) Full Standby Current (Both Ports - All CMOS Level Inputs Full Standby Current (One Port - All CMOS Level Inputs)
Test Conditions
Version
CEL and CER = VIL, MIL. SA Outputs open, LA f = fMAX(4) COM'L. SA LA CEL and CER = VIH, MIL. SA f = fMAX(4) LA COM'L. SA LA
SA LA Active Port Outputs COM'L. SA Open, f = fMAX(4) LA
ISB1
mA
ISB2
CE"A" = VIL and CE"B" = VIH (7)
MIL.
40 125 40 90 40 110 40 75 1.0 0.2 1.0 0.2 30 10 15 4
mA
ISB3
CEL and CER > VCC -0.2V,
VIN > VCC -0.2V or VIN < 0.2V,f = 0(5)
MIL.
SA LA COM'L. SA LA MIL.
mA
ISB4
CE"A" VCC -0.2V(7)
VIN > VCC -0.2V or VIN < 0.2V, Active Port Outputs Open, f = fMAX(4)
SA LA COM'L. SA LA
40 110 40 85 40 100 40 70
mA
NOTES: 2689 tbl 04 1. 'X' in part numbers indicates power rating (SA or LA). 2. Com'l Only, 0°C to +70°C temperature range. PLCC package only. 3. Not available in DIP packages. 4. At f = fMax, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using "AC TEST CONDITIONS" of input levels of GND to 3V. 5. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby. 6. Vcc = 5V, TA=+25°C for Typ. and is not production tested. Vcc DC = 100mA (Typ.) 7. Port "A" may be either left or right port. Port "B" is opposite from port "A".
DC ELECTRICAL CHARACTERISTICS OVER THE OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE (VCC = 5.0V ± 10%)
7132SA 7142SA Min. Max. -- -- -- -- 2.4 10 10 0.4 0.5 -- 7132LA 7142LA Max. Max. -- -- -- -- 2.4 5 5 0.4 0.5 --
Symbol |lLl| |lLO| V OL V OL VOH
Parameter Input Leakage Current(1) Output Leakage Current(1) Output Low Voltage (l/O0-l/O7) Open Drain Output Low Voltage (BUSY, INT) Output High Voltage Supply Current
Test Conditions VCC = 5.5V, VIN = 0V to VCCIN = GND to VCC VCC = 5.5V, CE = VIH, VOUT = 0V to VCCC lOL = 4mA lOL= 16mA lOL = 16mA lOH = -4mA VIN > VCC -0.2V or < 0.2V
Unit µA µA V V V
2689 tbl 05
NOTE: 1. At Vcc < 2.0V leakages are undefined.
6.02
3
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