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Part: IDT7204S30SOB
Category:
Logic
Description: CMOS Asynchronous Fifo With Retransmit 1k X 9, 2k X 9, 4k X 9
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT7204S30SOB datasheet File size : 398 kB
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Datasheet text preview:
CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
Integrated Device Technology, Inc.
IDT72021 IDT72031 IDT72041
FEATURES:
· First-In/First-Out Dual-Port memory · Bit organization IDT72021--1K x 9 IDT72031--2K x 9 IDT72041--4K x 9 · Ultra high speed IDT72021--25ns access time IDT72031--35ns access time IDT72041--35ns access time · Easily expandable in word depth and/or width · Asynchronous and simultaneous read and write · Functionally equivalent to IDT7202/03/04 with Output Enable (OE) and Almost Empty/Almost Full Flag (AEF) · Four status flags: Full, Empty, Half-Full (single device mode), and Almost Empty/Almost Full (7/8 empty or 7/8 full in single device mode) · Output Enable controls the data output port · Auto-retransmit capability · Available in 32-pin DIP and PLCC · Military product compliant to MIL-STD-883, Class B · Industrial temperature range (-40oC to +85oC) is avail able, tested to military electrical specifications
DESCRIPTION:
IDT72021/031/041s are high-speed, low-power, dual-port memory devices commonly known as FIFOs (First-In/FirstOut). Data can be written into and read from the memory at independent rates. The order of information stored and extracted does not change, but the rate of data entering the FIFO might be different than the rate leaving the FIFO. Unlike a Static RAM, no address information is required because the read and write pointers advance sequentially. The IDT72021/ 031/041s can perform asynchronous and simultaneous read and write operations. There are four status flags, (HF, FF, EF, AEF) to monitor data overflow and underflow. Output Enable (OE) is provided to control the flow of data through the output port. Additional key features are Write (W), Read (R), Retransmit (RT), First Load (FL), Expansion In (XI) and Expansion Out (XO). The IDT72021/031/041s are designed for those applications requiring data control flags and Output Enable (OE) in multiprocessing and rate buffer applications. The IDT72021/031/041s are fabricated using IDT's CMOS technology. Military grade product is manufactured in compliance with the latest version of MIL-STD-883, Class B, for high reliability systems.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUT (D0D8)
W
WRITE CONTROL
1 2
WRITE POINTER 1024/ 2048/ 4096 THREESTATE BUFFERS
RAM ARRAY 1024 x 9 2048 x 9 4096 x 9
READ POINTER
OE
RESET LOGIC
RS
FL/RT
R
READ CONTROL FLAG LOGIC EXPANSION LOGIC
DATA OUTPUTS (Q0Q8)
EF FF AEF
XI
XO/HF
2677 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc. For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
DECEMBER 1996
DSC-2677/7
5.09
1
IDT72021, IDT72031, IDT72041 CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
VCC D3 D8 D5
VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 D32-1
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC D4 D5 D6 D7
W
INDEX
VCC D4
W
D8 D3 D2
432 D2 D1 D0 5 6 7 8 9 10 11 12 13
1
32 31 30 29 28 27 26 25 24 23 22 21 D6 D7
D1 D0
XI AEF FF
Q0 Q1 Q2
J32-1
FL/RT RS OE EF XO/HF
Q7 Q6
XI AEF FF
Q0 Q1 Q2 Q3 Q8
FL/RT RS OE EF XO/HF
Q7 Q6 Q5 Q4
14 15 16 17 18 19 20
R
GND
2677 drw 02
Q3 Q8 GND
GND
Q4 Q5
R
GND
2677 drw 03
PLCC TOP VIEW
DIP TOP VIEW
PIN DESCRIPTIONS
Symbol D0D8 Name Inputs Reset I/O I I Data inputs for 9-bit wide data. When RS is set LOW, internal READ and WRITE pointers are set to the first location of the RAM array. HF and FF go HIGH, and AEF and EF go LOW. A reset is required before an initial WRITE after power-up. R and W must be HIGH during RS cycle. When WRITE is LOW, data can be written into the RAM array sequentially, independent of READ. In order for WRITE to be active, FF must be HIGH. When the FIFO is full (FF-LOW), the internal WRITE operation is blocked. When READ is LOW, data can be read from the RAM array sequentially, independent of WRITE. In order for READ to be active, EF must be HIGH. When the FIFO is empty (EF-LOW), the internal READ operation is blocked. The three-state output buffer is controlled by the read signal and the external output control (OE). This is a dual-purpose input. In the single device configuration (XI grounded), activating retransmit (FL/RT-LOW) will set the internal READ pointer to the first location. There is no effect on the WRITE pointer. R and W must be HIGH before setting FL/RT LOW. Retransmit is not compatible with depth expansion. In the depth expansion configuration, FL/RT-LOW indicates the first activated device. In the single device configuration, XI is grounded. In depth expansion or daisy chain expansion, XI is connected to XO (expansion out) of the previous device. When OE is set HIGH, the data flow through the three-state output buffer is inhibited regardless of an active READ operation. A read operation does increment the read pointer in this situation. When OE is set LOW, Q0-Q8 are still in a HIGH impedance condition if no READ occurs. For a complete READ operation with data appearing on Q0-Q8, both R and OE should be asserted LOW. When FF goes LOW, the device is full and further WRITE operations are inhibited. When FF is HIGH, the device is not full. When EF goes LOW, the device is empty and further READ operations are inhibited. When EF is HIGH, the device is not empty. When AEF is LOW, the device is empty to 1/8 full or 7/8 to completely full. When AEF is HIGH, the device is greater than 1/8 full, but less than 7/8 full. This is a dual purpose output. In the single device configuration (XI grounded), the device is more than half full when HF is LOW. In the depth expansion configuration (XO connected to XI of the next device), a pulse is sent from XO to XI when the last location in the RAM array is filled. Data outputs for 9-bit wide data.
2677 tbl 01
Description
RS W R FL/RT
Write
I
Read
I
First Load/ Retransmit
I
XI OE
Expansion In Output Enable
I I
FF EF AEF XO/HF
Full Flag Empty Flag Almost-Empty/ Almost-Full Flag Expansion Out/ Half-Full Flag
O O O O
Q0Q8
Outputs
O
5.09
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IDT72021, IDT72031, IDT72041 CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K x 9, 2K x 9, 4K x 9
MILITARY AND COMMERCIAL TEMPERATURE RANGES
STATUS FLAG
Number of Words in FIFO 1K 0 1-127 128-512 513-896 897-1023 1024 2K 0 1-255 256-1024 1025-1792 1793-2047 2048 4K 0 1-511 512-2048 2049-3584 3585-4095 4096
CAPACITANCE (TA = +25°C, f = 1.0 MHz)
FF AEF HF
H H H H H L L L H H L L H H H L L L
EF
L H H H H H
Symbol C IN C OUT
Parameter(1) Input Capacitance Output Capacitance
Condition VIN = 0V VOUT = 0V
Max. 10 10
Unit pF pF
2677 tbl 03
NOTE: 1. These parameters are sampled and not 100% tested.
RECOMMENDED DC OPERATING CONDITIONS
Symbol V CCM Parameter Military Supply Voltage Commercial Supply Voltage Supply Voltage Input High Voltage Commercial Input High Voltage Military Input Low Voltage Commercial and Military Min. 4.5 4.5 0 2.0 2.2 -- Typ. 5.0 5.0 0 -- -- -- Max. 5.5 5.5 0 -- -- 0.8 Unit V V V V V V
2677 tbl l 02
ABSOLUTE MAXIMUM RATINGS
Symbol Rating VTERM Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature IOUT DC Output Current
(1)
Com'l. Mil. Unit 0.5 to +7.0 0.5 to +7.0 V
VCCC GND V IH
0 to +70
55 to +125
°C °C °C mA V IH VIL(1)
55 to +125 65 to +135 55 to +125 65 to +155 50 50
NOTE: 1. 1.5V undershoots are allowed for 10ns once per cycle.
2677 tbl 05
NOTE: 2677 tbl 04 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliabilty.
5.09
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