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Part: IDT74FCT574DTSO
Category:
Logic
-> Registers
-> CMOS/BiCMOS->FCT/FCT-T Family
Description: Fast CMOS Octal D Register (3-state)
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT74FCT574DTSO datasheet File size : 843 kB
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Datasheet text preview:
IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL D REGISTERS (3-STATE)
IDT54/74FCT574/A/C
FEATURES:
· · · · · · · · · ·
IDT54FCT574A equivalent to FASTTM speed and drive IDT54/74FCT574A up to 30% faster than FAST IDT74FCT574C up to 50% faster than FAST IOL = 48mA (commercial) and 32mA (military) CMOS power levels (1mW typ. static) Edge-triggered master/slave, D-type flip-flops Buffered common clock and buffered common 3-state control MIlitary product compliant to MIL-STD-883, Class B Meets or exceeds JEDEC Standard 18 specifications Available in the following packages: Commercial: SOIC Military: CERDIP, LCC
DESCRIPTION:
The FCT574 is an 8-bit register built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the O outputs on the low-to-high transition of the clock input. The FCT574 has non-inverting outputs with respect to the data at the D inputs.
FUNCTIONAL BLOCK DIAGRAM
D0 CP CP D Q CP
D1
D2
D3
D4
D5
D6
D7
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
CP
D Q
OE O0 O1 O2 O3 O4 O5 O6 O7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-5428/2
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
VCC
20
D1
D0 D1 D2 D3 D4 D5 D6 D7 GND
2 3 4 5 6 7 8 9 10
19 18 17 16 15 14 13 12 11
O0 O1 O2 O3 O4 O5 O6 O7
D7 GND CP O7
3 2 1 19 18 17 16 15 14 9 10 11 12 13
D0
O0
OE
INDEX
OE
1
20
VCC
D2 D3 D4 D5 D6
4 5 6 7 8
O1 O2 O3 O4 O5
CP
CERDIP/ SOIC TOP VIEW
LCC TOP VIEW
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) TA TBIAS TSTG PT IOUT Rating Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Operating Temperature Temperature under BIAS Storage Temperature Power Dissipation DC Output Current 0 to +70 55 to +125 55 to +125 0.5 120 55 to +125 65 to +135 65 to +150 0.5 120 °C °C °C W mA 0.5 to VCC 0.5 to VCC V Commercial 0.5 to +7 Military 0.5 to +7 Unit V
PIN DESCRIPTION
Pin Names Dx CP Ox OE Description D flip-flop data inputs Clock Pulse for the register. Enters data on LOW-toHIGH transition. 3-State Outputs (TRUE) Active LOW 3-State Output Enable Input
FUNCTION TABLE(1)
Function High-Z Load Register OE H H L L H H Inputs CP L H Dx X X L H L H Outputs Ox Z Z L H Z Z Internal Ox NC NC H L H L
NOTES: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2 . Input and Vcc terminals only. 3 . Output and I/O terminals only.
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol CI N COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
NOTE: 1 . H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High Impedance NC = No Change = LOW-to-HIGH transition
NOTE: 1 . This parameter is measured at characterization but not tested.
2
O6
IDT54/74FCT574/A/C FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%, Military: TA = -55°C to +125°C, VCC = 5.0V ±10%
Symbol VIH VIL IIH IIL IOZH IOZL VIK IOS VOH Off State (High Impedance) Output Current Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Max. Parameter Input HIGH Level Input LOW Level Input HIGH Current VCC = Max. Input LOW Current Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VI = VCC VI = 2.7V VI = 0.5V VI = GND VO = VCC VO = 2.7V VO = 0.5V VO = GND GND(3) Min. 2 -- -- -- -- -- -- -- -- -- -- 60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- 0.7 120 VCC VCC 4.3 4.3 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) 5(4) 5 10 10(4) 10(4) 10 1.2 -- -- -- -- -- VLC VLC(4) 0.5 0.5 µA µA Unit V V
VCC = Min., IIN = 18mA VCC = Max., VO = VCC = 3V, VIN = VLC or VHC, IOH = 32µA VCC = Min IOH = 300µA VIN = VIH or VIL IOH = 12mA MIL IOH = 15mA COM'L VCC = 3V, VIN = VLC or VHC, IOL = 300µA VCC = Min IOL = 300µA VIN = VIH or VIL IOL = 32mA MIL IOL = 48mA COM'L
V mA V
VOL
Output LOW Voltage
V
NOTES: 1 . For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2 . Typical values are at VCC = 5.0V, +25°C ambient and maximum loading. 3 . Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4 . This parameter is guaranteed but not ttested.
3
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