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Part: IDT74LVCH16601A
Category:
Logic
-> Bus Interface
-> Bus Oriented Circuits
Description: 3.3v CMOS 18-bit Universal Bus Transceiver With 5v Tolerant I/o
Company: Integrated Device Technology, Inc.
Datasheet: Download IDT74LVCH16601A datasheet File size : 843 kB
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IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT IDT74LVCH16601A UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD
· Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) · VCC = 3.3V ± 0.3V, Normal Range · VCC = 2.7V to 3.6V, Extended Range · CMOS power levels (0.4µ W typ. static) µ · All inputs, outputs, and I/O are 5V tolerant · Supports hot insertion · Available in SSOP, TSSOP, and TVSOP packages
FEATURES:
DESCRIPTION:
DRIVE FEATURES: APPLICATIONS:
· High Output Drivers: ±24mA · Reduced system switching noise
· 5V and 3.3V mixed voltage systems · Data communication and telecommunication systems
The LVCH16601A 18-bit universal bus transceiver is built using advanced dual metal CMOS technology. The LVCH16601A combines D-type latches and D-type flip-flops to allow data flow in transparent, latched and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latched-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/ flip-flop on the low-to-high transition of CLKAB. Output enable OEAB is active low. When OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA and CLKENBA. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCH16601A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The LVCH16601A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
OEAB
1
CLKENAB 56 CLKAB 55 LEAB
2
LEBA 28 CLKBA 30 CLKENBA 29 OEBA 27
A1
3
CE 1D C1 CLK CE 1D C1 CLK
54
B1
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 1999 Integrated Device Technology, Inc.
TO 17 OTHER CHANNELS
MARCH 1999
DSC-4074/2
1
IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max VTERM Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND 0.5 to +6.5 65 to +150 50 to +50 50 ±100 TSTG IOUT IIK IOK ICC ISS
Unit V °C mA mA mA
OEAB LEAB A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA LEBA
CLKENAB CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLKBA CLKENBA
NOTE: 1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
PIN DESCRIPTION
Pin Names OEAB OEBA LEAB LEBA CLKAB CLKBA Ax Bx CLKENAB CLKENBA Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Latch Enable Input B-to-A Latch Enable Input A-to-B Clock Input B-to-A Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs(1) B-to-A Data Inputs or A-to-B 3-State Outputs(1) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW)
NOTE: 1 . These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
FUNCTION TABLE(1,2)
Inputs CLKENAB X X X H L L L L OEAB H L L L L L L L LEAB X H H L L L L L CLKAB X X X X L H Ax X L H X L H X X Outputs Bx Z L H B(3) L H B(3) B(4)
SSOP/ TSSOP/ TVSOP TOP VIEW
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol CI N COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 4.5 6.5 6.5 Max. 6 8 8 Unit pF pF pF
NOTE: 1 . As applicable to the device type.
NOTES: 1 . H = HIGH Voltage Level X = Don't Care L = LOW Voltage Level Z = High-Impedance = LOW-to-HIGH transition 2 . A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, CLKBA, and CLKENBA. 3 . Output level before the indicated steady-state input conditions were established. 4 . Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.
2
IDT74LVCH16601A 3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = 40°C to +85°C
Symbol VIH VIL IIH IIL IOZH IOZL IOFF VIK VH ICCL ICCH ICCZ ICC High Impedance Output Current (3-State Output pins) Input/Output Power Off Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 0V, VIN or VO 5.5V VCC = 2.3V, IIN = 18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC -- -- -- -- -- -- -- 0.7 100 -- -- -- ±50 1.2 -- 10 10 500 µA V mV µA VCC = 3.6V VO = 0 to 5.5V -- -- ±10 µA Parameter Input HIGH Voltage Level Input LOW Voltage Level Input Leakage Current VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VI = 0 to 5.5V Test Conditions Min. 1.7 2 -- -- -- Typ.(1) -- -- -- -- -- Max. -- -- 0.7 0.8 ±5 µA V Unit V
Quiescent Power Supply Current Variation
3.6 VIN 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND
µA
NOTES: 1 . Typical values are at VCC = 3.3V, +25°C ambient. 2 . This applies in the disabled state only.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: 1 . Pins with Bus-Hold are identified in the pin description. 2 . Typical values are at VCC = 3.3V, +25°C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V
Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V
Min. 75 75 -- -- --
Typ.(2) -- -- -- -- --
Max. -- -- -- -- ±500
Unit µA µA µA
3
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