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Details, datasheet, quote on part number:NW6003
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Datasheet text preview:
NW6003 Type II Caller ID Decoder
Data Sheet, January 2000 (Ver 2.0)
File No. NW6003DS(L)
7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 7654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Features
Description
The NW6003 device is a single-chip, 3/5 Volt CMOS caller ID and call waiting detection circuit. It can receive signals following Bellcore GR-30-CORE & SR-TSV-002476, BT SIN227 & SIN242, and CCA TW/P&E/312 specifications. The NW6003 provides 1200 baud Bell 202 and ITU-T V.23 FSK demodulation. It allows a microcontroller to extract data from it via a serial interface. In addition, the NW6003 offers Idle State and Loop State Tone Alert Signal and line reversal detection capability for BT CLIP, ring burst detection for the CCA CLIP, and ring and CAS detection for Bellcore CID. The device can be used in feature or cordless phones for BT Calling Line Identity Presentation (CLIP), CCA CLIP and Bellcore Calling Identity Delivery (CID) systems. It can also be used in caller ID boxes, modem, fax machines, answering machines, database query systems and Computer Telephony Integration (CTI) systems.
1200 baud Bell 202 and ITU-T V.23 Frequency Shift Keying (FSK) Demodulation Compliant with three specifications: Bellcore GR-30-CORE & SR-TSV-002476 British Telecom (BT) SIN227 & SIN242 Cable Communication Association (CCA) TW/P&E/312 Bellcore "CPE Alerting Signal (CAS)" and British Telecom "Idle State and Loop State Tone Alert Signal" detection Ring and line reversal detection High sensitivity with -40 dBV input Tone and FSK Detection Serial data interface to microcontroller 3 V ±10% or 5 V ±10% operation Low power CMOS with powerdown mode Operating temperature range: -40 °C to +85 °C Packages available: NW6003-XS 24 pin SOIC (where `X' is the revision ID)
TRIGIN
TRIGRC
TRIGOUT
OSCIN OSCOUT
Oscillator
Line Reverse and Ring Detector
Interrupt Generator
1
INT
3 V/5 V Detector
STD ST/GT EST CD DCLK DATA DR
Guard Time
VREF CAP PWDN
Bi as Generator
Dual Tone Detector
IN+ IN-
+ -
FSK Demodulator
Data/Timing Recovery
GS
FSKEN
MODE
Figure-1.
Integrated Device Technology, Inc.
Block Diagram
NW6003 Type II Caller ID Decoder Pin Information
IN+ INGS VREF CAP TRIGIN TRIGRC TRIGOUT MODE OSCIN OSCOUT GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC ST/GT EST STD INT CD DR DATA DCLK FSKEN PWDN TM
Figure-2. Pin Assignment
Type Pin No. De scription I 1 Non-inve rting Input of the gain adjustable op amp. I 2 Inverting Input of the gain adjustable op amp. O 3 Ga in Select Output of the gain adjustable op amp. Select the op amp gain by adjusting the resistor ratio in the feed-back resistor network. VREF O 4 Re ference Voltage. This output is used to bias the input op amp. It is typically VCC/2. CAP O 5 Ca pa citor Connector. A 0.1µF decoupling capacitor should be connected between this pin and GND. TRIGIN I 6 Trigger Input. Th is is a Schmitt trigger input used for ring detection and line reversal detection. TRIGRC I/O 7 Trigger Resistor and Capacitor Connector. Th is pin is connected to VCC and GND through resistor and capacitor. The RC value de cid es the time delay from TRIGIN going inactive (low) to TRIGOUT becoming inactive (hi gh). See Fig.6 for reference. TRIGOUT O 8 Trigger Output. Th is is a Schmitt trigger buffer output indicating the detection of line reversal and/or ringing. MODE I 9 Se ria l FSK Interface MODE Select. A low level on this pin sets the interface to mode '0', while a high level sets it to mode '1'. OSCIN I 10 Oscilla tor Input. A 3.579545 MHz crystal or ceramic resonator should be connected between this pin and the OSCOUT. It can also be driven by an external clock source. OSCOUT O 11 Oscilla tor Output. A 3.579545 MHz crystal or ceramic resonator should be connected between this pin and and OSCIN. When OSCIN is driven by an external clock, this pin should be left floating. GND -12 Ground. TM I 13 Te st Mode. Must be connected to GND for normal operation.
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Nam e IN+ INGS
NW6003 Type II Caller ID Decoder Pin Information (Continued)
Name Type Pin No. Description PW DN I 14 Pow e r Down. This is an active high Schmitt trigger input. When active, the device enters a minimal power state by disabling all internal functional circuits except TRIGIN, TRIGRC and TRIGOUT. It must be low for normal operation. FSKEN I 15 FSK Enable. When this pin is high, FSK demodulation is enabled. This pin should be set low to disable the FSK demodulator from reacting to extraneous signals such as speech, alert signal etc. DCLK I/NC 16 Data Clock. In mode '0' (MODE pin low), this pin is unused. In mode '1' (MODE pin high), this pin is an input, Data Clock is provided by microcontroller. DATA O 17 Data Output. In mode '0', data appears on this pin once demodulated. In mode '1', data is shifted out on the ri s ing edge of DCLK, which is supplied by microcontroller. DR O/NC 18 Data Ready Output. In mode '0', this pin is unused. In mode '1', this pin indicates to the microcontroller that 8-bit data is ready. Microcontroller initializes the DCLK signal to read out the data. CD O 19 FSK Carrier Detect . This is an active low CMOS output signal to indicate the presence of in-band FSK signal. INT OD 20 Interrupt. This is an active low open drain output. This pin is used to interrupt the microcontroller when TRIGOUT or DR is low, or STD is high. It remains low until all three signals become inactive. STD O 21 Dual Tone Alert Signal Delayed Steering Output. An active high signal to indicate the detection of a "guard time qualified" Dual Tone Alert Signal. EST O 22 Dual Tone Alert Signal Early Steering Output. This pin is an active high output to indicate the detection of Dual Tone Alert Signal. ST/GT I/O 23 Dual Tone Alert Signal Steering Input/Guard Time. It's a CMOS output and an input of voltage comparator. If the voltage at this pin is greater than voltage threshold (See Fig-6), STD is asserted high to indicate that a dual tone has been detected. A voltage less than threshold enables the device to accept a new dual tone. External RC are connected to EST and VCC pins. VCC -24 3/5 V Power Supply.
Abbreviation Index
CAS ----------------------------------------------------------CDS ----------------------------------------------------------CID -----------------------------------------------------------CIDCW ------------------------------------------------------CLIP ---------------------------------------------------------CNAM -------------------------------------------------------CND ---------------------------------------------------------CNIC --------------------------------------------------------CO ------------------------------------------------------------CTI ----------------------------------------------------------TE -------------------------------------------------------------CPE Alerting Signal Caller Display Service Calling Identity Delivery Calling Identity Delivery on Call Waiting Calling Line Identity Presentation Calling Name Delivery Calling Number Delivery Calling Number Identification Circuit Central Office Computer Telephony Integration Terminal Equipment
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