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Part: IS62LV1024LL-70

Category:
 Memory
   -> SRAM
             -> SRAM

Description: 128Kx8 Low Power And Low VCC CMOS Static RAM

Company: Integrated Silicon Solution Inc.

Datasheet: Download IS62LV1024LL-70 datasheet     File size : 104 kB

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Datasheet text preview:
IS62LV1024LL
128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM
FEATURES
· Access times of 45, 55, and 70 ns · Low active power: 60 mW (typical) · Low standby power: 15 µW (typical) CMOS standby · Low data retention voltage: 2V (min.) · Ultra Low Power · Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications · TTL compatible inputs and outputs · Single 2.5V to 3.3V · Industrial temperature available · Available in 32-pin TSOP (Type I), 32-pin STSOP, and 450-mil SOP
ISSI
DESCRIPTION
®
JANUARY 2001
The ISSI IS62LV1024LL is a low power and low Vcc,131,072-word by 8-bit CMOS static RAM. It is f a b r i c a t e d using ISSI's high-performance CMOS t e c h n o l o g y . This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62LV1024LL is available in 32-pin TSOP (Type I), STSOP (8 x 13.4mm), and 450-mil plastic SOP (525-mil pin to pin) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 X 2048 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1 CE2 OE WE
CONTROL CIRCUIT
This document contISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 01/31/01
1
IS62LV1024LL
PIN CONFIGURATION
32-Pin SOP (Q)
ISSI
PIN CONFIGURATION
32-Pin TSOP (Type I) (T) and STSOP (Type 1) (H)
®
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3
A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3
PIN DESCRIPTIONS
A0-A16 CE1 CE2 OE WE I/O0-I/O7 NC Vcc GND Address Inputs Chip Enable 1 Input Chip Enable 2 Input Output Enable Input Write Enable Input Input/Output No Connection Power Ground
OPERATING RANGE
Range Commercial Ambient Temperature 0°C to +70°C Speed -45 ns -55 ns -70 ns VCC 2.85V to 3.15V 2.5V to 3.3V 2.5V to 3.3V 2.5V to 3.3V
Industrial
­40°C to +85°C
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 01/31/01
IS62LV1024LL
TRUTH TABLE
Mode Not Selected (Power-down) Output Disabled Read Write WE X X H H L CE1 H X L L L CE2 X L H H H OE X X H L X I/O Operation High-Z High-Z High-Z DOUT DIN Vcc Current ISB1, ISB2 ISB1, ISB2 ICC ICC ICC
ISSI
®
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VT E R M VCC TB I A S TSTG PT Parameter Terminal Voltage with Respect to GND Vcc related to GND Temperature Under Bias Storage Temperature Power Dissipation Value ­0.5 to Vcc + 0.5 ­0.3 to +3.6 ­40 to +85 ­65 to +150 0.7 Unit V V °C °C W
Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF
Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 3.0V.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. H 01/31/01
3


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