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Details, datasheet, quote on part number:28F020
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Datasheet text preview:
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12.0 V ±5% VPP
28F020 2048K (256K X 8) CMOS FLASH MEMORY
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Command Register Architecture for Microprocessor/Microcontroller Compatible Write Interface Noise Immunity Features ±10% VCC Tolerance Maximum Latch-Up Immunity through EPI Processing ETOXTM Nonvolatile Flash Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience JEDEC-Standard Pinouts 32-Pin Plastic Dip 32-Lead PLCC 32-Lead TSOP
(See Packaging Spec., Order #231369)
Flash Electrical Chip-Erase 2 Second Typical Chip-Erase Quick-Pulse Programming Algorithm 10 µS Typical Byte-Program 4 second Chip-Program 100,000 Erase/Program Cycles High-Performance Read 90 ns Maximum Access Time CMOS Low Power Consumption 10 mA Typical Active Current 50 µA Typical Standby Current 0 Watts Data Retention Power Integrated Program/Erase Stop Timer
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Extended Temperature Options
Intel's 28F020 CMOS flash memory offers the most cost-effective and reliable alternative for read/write random access nonvolatile memory. The 28F020 adds electrical chip-erasure and reprogramming to familiar EPROM technology. Memory contents can be rewritten: in a test socket; in a PROM-programmer socket; onboard during subassembly test; in-system during final test; and in-system after sale. The 28F020 increases memory flexibility, while contributing to time and cost savings. The 28F020 is a 2048-kilobit nonvolatile memory organized as 262,144 bytes of eight bits. Intel's 28F020 is offered in 32-pin plastic DIP, 32-lead PLCC, and 32-lead TSOP packages. Pin assignments conform to JEDEC standards for byte-wide EPROMs. Extended erase and program cycling capability is designed into Intel's ETOXTM (EPROM Tunnel Oxide) process technology. Advanced oxide processing, an optimized tunneling structure, and lower electric field combine to extend reliable cycling beyond that of traditional EEPROMs. With the 12.0 V VPP supply, the 28F020 performs 100,000 erase and program cycles--well within the time limits of the quick-pulse programming and quick-erase algorithms. Intel's 28F020 employs advanced CMOS circuitry for systems requiring high-performance access speeds, low power consumption, and immunity to noise. Its 90 ns access time provides zero wait-state performance for a wide range of microprocessors and microcontrollers. Maximum standby current of 100 µA translates into power savings when the device is deselected. Finally, the highest degree of latch-up protection is achieved through Intel's unique EPI processing. Prevention of latch-up is provided for stresses up to 100 mA on address and data pins, from 1 V to VCC + 1 V. With Intel's ETOX process technology base, the 28F020 builds on years of EPROM experience to yield the highest levels of quality, reliability, and cost-effectiveness.
December 1997
Order Number: 290245-009
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. The 28F020 may contain design defects or errors known as errata. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel's website at http://www.intel.com Copyright © Intel Corporation 1996, 1997. * Third-party brands and names are the property of their respective owners.
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28F020
CONTENTS
PAGE PAGE 4.0 ELECTRICAL SPECIFICATIONS.........18 4.1 Absolute Maximum Ratings ......18 4.2 Operating Conditions..........18 4.3 Capacitance .....18 4.4 DC Characteristics--TTL/NMOS Compatible--Commercial Products..19 4.5 DC Characteristics--CMOS Compatible-- Commercial Products ........20 4.6 DC Characteristics--TTL/NMOS Compatible--Extended Temperature Products .... 22 4.7 DC Characteristics--CMOS Compatible-- Extended Temperature Products ......24 4.8 AC Characteristics--Read Only Operations--Commercial and Extended Temperature Products.......28 4.9 AC Characteristics--Write/Erase/Program Only Operations--Commercial and Extended Temperature Products ......30 4.10 Erase and Programming Performance.....31 4.11 AC Characteristics--Alternate CE# Controlled Writes--Commercial and Extended Temperature Products ......35 5.0 ORDERING INFORMATION.......38 6.0 ADDITIONAL INFORMATION ....38
1.0 APPLICATIONS .... 5 2.0 PRINCIPLES OF OPERATION ..... 8 2.1 Integrated Stop Timer .......... 8 2.2 Write Protection .......... 9 2.2.1 Bus Operations.....9 2.2.1.1 Read.....9 2.2.1.2 Output Disable ...... 10 2.2.1.3 Standby ....... 10 2.2.1.4 Intelligent Identifier Operation ....... 10 2.2.1.5 Write ............ 10 2.2.2 Command Definitions .. 10 2.2.2.1 Read Command....11 2.2.2.2 Intelligent Identifier Command ...... 11 2.2.2.3 Set-Up Erase/Erase Commands...12 2.2.2.4 Erase Verify Command........12 2.2.2.5 Set-Up Program/Program Commands .......... 12 2.2.2.6 Program Verify Command ... 12 2.2.2.7 Reset Command...13 2.2.3 Extended Erase/Program Cycling........13 2.2.4 Quick-Pulse Programming Algorithm ... 13 2.2.5 Quick-Erase Algorithm.......13 3.0 DESIGN CONSIDERATIONS ...... 16 3.1 Two-Line Output Control .... 16 3.2 Power Supply Decoupling .. 16 3.3 VPP Trace on Printed Circuit Boards..16 3.4 Power-Up/Down Protection ...... 16 3.5 28F020 Power Dissipation ....... 16
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28F020
REVISION HISTORY
Number -004 -005 -006 -007 -008 -009 Description
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Removed Preliminary Classification. Clarified AC and DC test conditions. Added "dimple" to F TSOP package. Corrected serpentine layout. Added 80V05, 90 ns speed grades. Added extended temperature devices. Corrected AC Waveforms. Added 70 ns speed. Deleted 80 V05 speed. Revised symbols, i.e., CE, OE, etc. to CE#, OE#, etc. Updated Command Def. Table. Updated 28F020 Quick-Erase Algorithm. Updated AC Characteristics. Removed serpentine layout diagram. Minor changes throughout document. Deleted 70 ns speed and F TSOP package. Added 120 ns speed and extended temperature devices. Updated Ordering Information chart. Updated AC Characteristics. Replaced references to 70 ns with 90 ns on first page. Removed F TSOP package pin configuration diagram.
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1.0 APPLICATIONS
The 28F020 flash memory provides nonvolatility along with the capability to perform over 100,000 electrical chip-erasure/reprogram cycles. These features make the 28F020 an innovative alternative to disk, EEPROM, and battery-backed static RAM. Where periodic updates of code and data tables are required, the 28F020's reprogrammability and nonvolatility make it the obvious and ideal replacement for EPROM. Primary applications and operating systems stored in flash eliminate the slow disk-to-DRAM download process. This results in dramatic enhancement of performance and substantial reduction of power consumption--a consideration particularly important in portable equipment. Flash memory increases flexibility with electrical chip-erasure and in-system update capability of operating systems and application code. With updatable code, system manufacturers can easily accommodate lastminute changes as revisions are made. In diskless workstations and terminals, network traffic reduces to a minimum and systems are instant-on. Reliability exceeds that of electromechanical media. Often in these environments, power interruptions force extended re-boot periods for all networked terminals. This mishap is no longer an issue if boot code, operating systems, communication protocols and primary applications are flash resident in each terminal. For embedded systems that rely on dynamic RAM/disk for main system memory or nonvolatile backup storage, the 28F020 flash memory offers a solid state alternative in a minimal form factor. The 28F020 provides higher performance, lower power consumption, instant-on capability, and allows an "eXecute in place" (XIP) memory hierarchy for code and data table reading. Additionally, the flash memory is more rugged and reliable in harsh environments where extreme temperatures and shock can cause disk-based systems to fail. The need for code updates pervades all phases of a system's life--from prototyping to system manufacture to after sale service. The electrical chip-erasure and reprogramming ability of the 28F020 allows in-circuit alterability; this eliminates unnecessary handling and less reliable socketed
28F020
connections, while adding greater manufacture, and update flexibility.
test,
Material and labor costs associated with code changes increases at higher levels of system integration--the most costly being code updates after sale. Code "bugs," or the desire to augment system functionality, prompt after sale code updates. Field revisions to EPROM-based code requires the removal of EPROM components or entire boards. With the 28F020, code updates are implemented locally via an edge connector, or remotely over a communications link. For systems currently using a high-density static RAM/battery configuration for data accumulation, flash memory's inherent nonvolatility eliminates the need for battery backup. The concern for battery failure no longer exists, an important consideration for portable equipment and medical instruments, both requiring continuous performance. In addition, flash memory offers a considerable cost advantage over static RAM. Flash memory's electrical chip-erasure, byte programmability and complete nonvolatility fit well with data accumulation and recording needs. Electrical chip-erasure gives the designer a "blank slate" in which to log or record data. Data can be periodically off-loaded for analysis and the flash memory erased producing a new "blank slate." A high degree of on-chip feature integration simplifies memory-to-processor interfacing. Figure 3 depicts two 28F020s tied to the 80C186 system bus. The 28F020's architecture minimizes interface circuitry needed for complete in-circuit updates of memory contents. The outstanding feature of the TSOP (Thin Small Outline Package) is the 1.2 mm thickness. TSOP is particularly suited for portable equipment and applications requiring large amounts of flash memory. With cost-effective in-system reprogramming, extended cycling capability, and true nonvolatility, the 28F020 offers advantages to the alternatives: EPROMs, EEPROMs, battery backed static RAM, or disk. EPROM-compatible read specifications, straightforward interfacing, and in-circuit alterability offers designers unlimited flexibility to meet the high standards of today's designs.
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