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Details, datasheet, quote on part number:8XC196KD
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Datasheet text preview:
8XC196KD 8XC196KD20 COMMERCIAL CHMOS MICROCONTROLLER
87C196KD 32 Kbytes of On-Chip OTPROM 83C196KD 32 Kbytes of ROM
Y Y Y Y Y Y Y Y Y Y Y
16 MHz and 20 MHz Available 1000 Byte Register RAM Register-to-Register Architecture 28 Interrupt Sources 16 Vectors Peripheral Transaction Server 1 4 ms 16 x 16 Multiply (20 MHz) 2 4 ms 32 16 Divide (20 MHz) Powerdown and Idle Modes Five 8-Bit I O Ports 16-Bit Watchdog Timer Dynamically Configurable 8-Bit or 16-Bit Buswidth
Y Y Y Y Y Y Y
Full Duplex Serial Port High Speed I O Subsystem 16-Bit Timer 16-Bit Up Down Counter with Capture 3 Pulse-Width-Modulated Outputs Four 16-Bit Software Timers 8- or 10-Bit A D Converter with Sample Hold HOLD HLDA Bus Protocol
Y
I OTP One-Time Programmable Version I Extended Temperature Available
The 8XC196KD 16-bit microcontroller is a high performance member of the MCS 96 microcontroller family he 8XC196KD is an enhanced 80C196KC device with 1000 bytes RAM 16 MHz operation and an optional 32 Kbytes of ROM EPROM Intel's CHMOS III process provides a high performance processor along with low T power consumption he 8XC196KD has a maximum guaranteed frequency of 16 MHz The 8XC196KD20 has a maximum guaranteed frequency of 20 MHz Unless otherwise noted all references to the 8XC196KD also refer to the F 8XC196KD20 our high-speed capture inputs are provided to record times when events occur Six high-speed outputs are available for pulse or waveform generation The high-speed output can also generate four software timers or start an A D conversion Events can be based on the timer or up down counter W ith the commercial (standard) temperature option, operational characteristics are guaranteed over the temperature range of the 0°C to +70°C. With the extended (express) temperature range option, operational characteristics are guaranteed over the temperature range of -40°C to +85°C. Unless otherwise noted, the specifications are the same for both options. See the packaging information for extended temperature designators.
*Other brands and names may be claimed as the property of others. Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata M COPYRIGHT © INTEL CORPORATION, 2 0 0 2 ay 2002 Order Number: 272145-004
8XC196KD 8XC196KD20
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Figure 1 8XC196KD Block Diagram
87C196KD ENHANCED FEATURE SET OVER THE 87C196KC
1 The 87C196KD has twice the RAM and twice the 2 OTPROM space of the 87C196KC The vertical windowing scheme has been extended to allow all 1000 bytes of register RAM to be windowed into the lower register file
OC3 (0CH HWIN1 READ WRITE)
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NOTE R SV Reserved bits must be e 0
Figure 2 87C196KD New SFR Bit (CLKOUT Disable)
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8XC196KD 8XC196KD20
8XC196KD VERTICAL WINDOWING MAP
Table 1 128-Byte Windows Address to Remap 0380H 0300H 0280H 0200H 0180H 0100H 0080H 0000H Device Series KD KD KD KD KC KD KC KD KC KD KC KD WSR Contents X001 0111B e 17H X001 0110B e 16H X001 0101B e 15H X001 0100B e 14H X001 0011B e 13H X001 0010B e 12H X001 0001B e 11H X001 0000B e 10H
Table 3 32-Byte Windows Address to Remap 03E0H 03C0H 03A0H 0380H 0360H 0340H 0320H 0300H 02E0H 02C0H 02A0H 0280H 0260H 0240H 0220H 0200H 01E0H 01C0H 01A0H 0180H 0160H 0140H 0120H 0100H 00E0H 00C0H 00A0H 0080H 0060H 0040H 0020H 0000H Device Series KD KD KD KD KD KD KD KD KD KD KD KD KD KD KD KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD WSR Contents X101 1111B e 5FH X101 1110B e 5EH X101 1101B e 5DH X101 1100B e 5CH X101 1011B e 5BH X101 1010B e 5AH X101 1001B e 59H X101 1000B e 58H X101 0111B e 57H X101 0110B e 56H X101 0101B e 55H X101 0100B e 54H X101 0011B e 53H X101 0010B e 52H X101 0001B e 51H X101 0000B e 50H X100 1111B e 4FH X100 1110B e 4EH X100 1101B e 4DH X100 1100B e 4CH X100 1011B e 4BH X100 1010B e 4AH X100 1001B e 49H X100 1000B e 48H X100 0111B e 47H X100 0110B e 46H X100 0101B e 45H X100 0100B e 44H X100 0011B e 43H X100 0010B e 42H X100 0001B e 41H X100 0000B e 40H
Window in Lower Register File 80HFFH
Table 2 64-Byte Windows Address to Remap 03C0H 0380H 0340H 0300H 02C0H 0280H 0240H 0200H 01C0H 0180H 0140H 0100H 00C0H 0080H 0040H 0000H Device Series KD KD KD KD KD KD KD KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD KC KD WSR Contents X010 1111B e 2FH X010 1110B e 2EH X010 1101B e 2DH X010 1100B e 2CH X010 1011B e 2BH X010 1010B e 2AH X010 1001B e 29H X010 1000B e 28H X010 0111B e 27H X010 0110B e 26H X010 0101B e 25H X010 0100B e 24H X010 0011B e 23H X010 0010B e 22H X010 0001B e 21H X010 0000B e 20H
Window in Lower Register File C0HFFH
Window in Lower Register File E0H FFH
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8XC196KD 8XC196KD20
PROCESS INFORMATION
This device is manufactured on PX29 5 or PX29 9 a CHMOS III process Additional process and reliability information is available in Intel's Components Quality and Reliability Handbook Order Number 210997 E
able 5 8XC196KD Memory Map Description External Memory or I O Internal ROM OTPROM or External Memory (Determined by EA) Reserved Must contain FFH (Note 5) PTS Vectors Upper Interrupt Vectors ROM OTPROM Security Key Reserved Must contain FFH (Note 5) Reserved Must Contain 20H (Note 5) CCB Reserved Must contain FFH (Note 5) Address 0FFFFH 0A000H 9FFFH 2080H 207FH 205EH 205DH 2040H 203FH 2030H 202FH 2020H 201FH 201AH 2019H 2018H 2017H 2014H 2013H 2000H 1FFFH 1FFEH 1FFDH 0400H 03FFH 0018H 0017H 0000H
T=Extended temperature -40°C to +85°C with Intel Standard Burn-in
XAMPLE N87C196KD20 is 68-Lead PLCC F OTPROM 20 MHz or complete package dimensional data refer to the N Intel Packaging Handbook (Order Number 240800) 1 OTE EPROMs are available as One Time Programmable F TPROM) only (O
Lower Interrupt Vectors Port 3 and Port 4 External Memory 1000 Bytes Register RAM (Note 1)
igure 3 The 8XC196KD Family Nomenclature Table 4 Thermal Characteristics Package Type PLCC QFP SQFP ija 35 C W 56 C W 68 C W ijc 13 C W 12 C W 15 5 C W
CPU SFR's (Notes 1 3)
All thermal impedance data is approximate for static air conditions at 1W of power dissipation Values will change depending on operation conditions and application See the Intel Packaging Handbook (order number 240800) for a description of Intel's thermal impedance test methodology
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1 NOTES Code executed in locations 0000H to 03FFH will be 2 forced external Reserved memory locations must contain 0FFH unless T 3 noted 4 Reserved SFR bit locations must contain 0 5 Refer to 8XC196KC for SFR descriptions WARNING Reserved memory locations must not be written or read The contents and or function of these loT cations may change with future revisions of the device herefore a program that relies on one or more of these locations may not function properly
8XC196KD 8XC196KD20
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Figure 4 68-Pin PLCC Package
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