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Details, datasheet, quote on part number:8XC196NP
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Datasheet text preview:
8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
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25 MHz Operation at 4.55.5 Volts 1 Mbyte of Linear Address Space Optional 4 Kbytes of ROM 1000 Bytes of Register RAM Register-register Architecture 32 I/O Port Pins 16 Prioritized Interrupt Sources 4 External Interrupt Pins and NMI Pin 2 Flexible 16-bit Timer/Counters with Quadrature Counting Capability 3 Pulse-width Modulator (PWM) Outputs with High Drive Capability Full-duplex Serial Port with Dedicated Baud-rate Generator Peripheral Transaction Server Event Processor Array (EPA) with 4 High-speed Capture/Compare Channels
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Chip-select Unit -- 6 Chip Select Pins -- Dynamic Demultiplexed/Multiplexed Address/Data Bus for Each Chip Select -- Programmable Wait States (0, 1, 2, or 3) for Each Chip Select -- Programmable Bus Width (8- or 16bit) for Each Chip Select -- Programmable Address Range for Each Chip Select 1.12 µs 16 × 16 Unsigned Multiplication 1.92 µs 32/16 Unsigned Division 100-pin SQFP or 100-pin QFP Package Complete System Development Support High-speed CHMOS Technology
The 8XC196NP is a member of Intel's 16-bit MCS® 96 microcontroller family. The device features 1 Mbyte of linea r address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch betw ee n multiplexed and demultiplexed operation. When operating at 25 MHz in demultiplexed mode, the 8XC1 96 NP can access a 100 ns memory device with zero wait states. The 8XC196NP is available without ROM (80C196NP) or with 4 Kbytes of ROM (83C196NP).
Information in this document is provided solely to enable use of Intel products. Intel assumes no liability whatsoever, including infringemen t of any patent or copyright, for sale and use of Intel products except as provided in Intel's Terms and Conditions of Sale for such produ cts. Information contained herein supersedes previously published specifications on these devices from Intel. © INTEL CORPORATION, 1995 Octob er 1995 Orde r Number: 272459-005
8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
16 CPU 1000 B R yte egister F 2 ile 4K Bytes ROM (optional) A
RALU
Cnterrupt I ontroller
4 Bytes CPU SFRs
ME rocode ic ngine
T eripheral P ransaction S erver 8 16
emory Controller C with hip Select Q M ueue
Chip Select CS5:0#
S ontrol C ignals E A19:16/ PORT3:0
A15:0 W lse Pu idth odulator
Timer 1 Timer 2
P Event rocessor A rray
Serial P ort
Baud R Gate en
M
D15:0
P3rt o Port 1 Port 2
P4rt o
Port 1/ EPA3:0, T imer 1, Timer 2
Port 2/ Hold Control, E SIO, XTINT1:0
Port 3/ Port 4/ EXTINT3:2 PWM2:0
A2351-01
Figure 1. 8XC196NP Block Diagram
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8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
PROCESS INFORMATION
This device is manufactured on P648, a CHMOS IV process. Additional process and reliability information is available in Intel's Components Quality and Reliability Handbook (order number 210997). All thermal impedance data is approximate for static ai r conditions at 1 watt of power dissipation. Values will change depending on operating conditions and th e application. The Intel Packaging Handbook (orde r number 240800) describes Intel's thermal im ped an ce test methodology.
Table 1. Thermal Characteristics Packag e Type 100-pin SQFP 100-pin QFP JA 55°C/W 56°C/W JC 14 °C/W 16 °C/W
X
Te
XX
Pa ck
8
X
Pr og
X
Pr oc
XXXXX
Pr od
XX
De
Figure 2. The 8XC196NP Family Nomenclature Table 2. Description of Product Nomenclature Pa ram et er Te mpe rat ure and Burn-in Options Packaging Options Pro gram m emory Options Pro cess Information Pro du ct Family De vice Speed Options no mark S SB 0 3 C 196NP no mark 25 MHz D escription Commercial operating temperature range (0°C to 70°C) with Intel standard burn-in. QF P S QFP No ROM ROM CH MOS
mp er
vic
es
ra
uc
ag ing Op tio ns
eS
m-
sI
tF
atu re an
pe
me
nfo rm ati
am
ed
mo
ily
ry
dB ur
on
Op tio
nin Op tio ns
ns
A2815-01
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8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
Table 3. 8XC196NP Memory Map Address (Note 1) FF FFFFH FF 3000H FF 2FFFH FF 2000H FF 1FFFH FF 0000H FE FFFFH 0F 0000H 0E FFFFH 01 0000H 00 FFFFH 00 3000H 00 2FFFH 00 2000H 00 1FFFH 00 1FE0H 00 1FDFH 00 1F00H 00 1EFFH 00 0400H 00 03FFH 00 0100H 00 00FFH 00 0018H 00 0017H 00 0000H Description Extern al device (memory or I/O) connected to address/data bus Intern al ROM or external device (memory or I/O) connected to address/data bus (determined by EA# pin) Extern al device (memory or I/O) connected to address/data bus Overla id memory (reserved for future devices) 89 6 Kbytes of external device (memory or I/O) connected to address/data bus Extern al device (memory or I/O) connected to address/data bus Extern al device (memory or I/O) connected to address/data bus or remapped internal ROM Memory-m apped peripheral special-function registers (SFRs) Intern al peripheral special-function registers (SFRs) Extern al device (memory or I/O) (reserved for future devices) Upp er register file (general-purpose register RAM) Lo wer register file (general-purpose register RAM and stack pointer) Lower register file (CPU SFRs) Notes 9 2,9 3,9 3,9 9 9 5, 6,9 4, 7,9 4, 7, 10 6 8, 10 8, 11 4, 7, 8, 11
NOTE S: 1. In te rna lly, there are 24 address bits (A23:0); however, only 20 address lines (A19:0) are bonded out. Th e external address space is 1 Mbyte (00000FFFFFH). 2. The 8XC196NP resets to internal address FF2080H (FF2080H in internal ROM or F2080H in external mem ory). 3. Do not locate code in addresses xF0000xF00FFH. These addresses are reserved for the ICE in-circui t emulator. Unless otherwise noted, write 0FFH to reserved memory locations. 4. Un less otherwise noted, write 0 to reserved SFR bits. 5. These areas are mapped into internal ROM if the REMAP bit (CCB1.2) is set and EA# is at logic 1. Oth erwi se, they are mapped to external memory. 6. WA RNING: The contents or functions of these memory locations may change with future device revisions, in which case a program that relies on one or more of these locations may not function properly. 7. Re fer to the 8XC196NP User's Manual or 8XC196NP Quick Reference for SFR descriptions. 8. Co de executed in locations 000000H to 0003FFH will be forced external. 9. Ad dre s s with indirect, indexed, or extended modes. 10. Ad dre s s with indirect, indexed, or extended modes or through register windows. 11. Addre s s with direct, indirect, indexed, or extended modes.
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RESET# N E MI A# A0 V1 VCC AS S A2 A3 A4 A5 A6 V7 VCC NS S NC P C 3.0 / CS0# P3.1 / CS1# P3.2 / CS2# P3.3 / CS3# VSS P 3.4 / CS4# P3.5 / CS5# P3.6 / EXTINT2 2 1 3 4 5 6 7 8 9 1 10 11 12 13 14 15 16 17 18 29 20 21 22 23 24 5
SB8XC196NP
View of component as mounted on PC board
Figure 3. 8XC196NP 100-pin SQFP Package
A
P3.7 / EXTINT3 P1.0 / EPA0 VCC P 1.1 / EPA1 P1.2 / EPA2 P1.3 / EPA3 P1.4 / T1CLK P1.5 / T1DIR VCC P 1.6 / T2CLK VSS P 1.7 / T2DIR P4.0 / PWM0 P4.1 / PWM1 P4.2 / PWM2 P4.3 V VCC P SS 2.0 / TXD P2.1 / RXD P2.2 / EXTINT0 P2.3 / BREQ# P2.4 / EXTINT1 P2.5 / HOLD# P2.6 / HLDA#
26 27 28 39 30 31 32 33 34 35 36 37 38 49 40 41 42 43 44 45 46 47 48 59 0
100 9 99 98 97 96 95 94 93 92 91 80 89 88 87 86 85 84 83 82 81 70 79 78 77 6
AD0 AD1 AD2 AD3 AD4 AD5 AD6 VD7 ACC VD8 ASS AD9 AD10 AD11 AD12 AD13 AD14 AD15 16 / EPORT.0 A17 / EPORT.1 V CC ASS 18 / EPORT.2 A19 / EPORT.3 WR# / WRL#
75 74 73 72 71 60 69 68 67 66 65 64 63 62 61 50 59 58 57 56 55 54 53 52 1 RD# BHE# / WRH# I ALE R ST N READY OPD V NCE VSS VCC ASS A8 A9 A10 A11 A12 A13 A14 N15 VC XSS XTAL1 VTAL2 NSS PC 2.7 / CLKOUT
2348-04
8XC196NP COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
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