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Part: PENTIUMII
Category:
Microprocessors
-> CISC
-> X86 Family
Description: Processor at 233 Mhz, 266 Mhz, 300 Mhz, And 333 MHZ
Company: Intel Corporation
Datasheet: Download PENTIUMII datasheet File size : 73 kB
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Datasheet text preview:
Pentium® II Processor Low-Power Module
Datasheet
Product Features
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Pentium® II Processor Low Power running at 266 MHz Second-level cache of pipeline burst SRAM -- Dedicated 64-bit wide bus for high speed data transfer -- 512 Kbyte cache data array -- Clock to BSRAM turns off when processor is in low-power states Processor core voltage regulation supports input voltages from 5 V to 21 V -- Above 80 percent peak efficiency Active Thermal Feedback (ATF) sensing -- Internal A/D - digital signaling (SMBUS) across the module interface -- Programmable trip point interrupt or poll mode for temperature reading
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Thermal transfer plate for heat dissipation Intel 443BX Host Bridge/Controller -- DRAM controller supports EDO and SDRAM at 3.3 V -- Supports PCI CLKRUN# protocol -- SDRAM clock enable support and self refresh of EDO or SDRAM during Suspend mode -- Compatible SMRAM (C_SMRAM) and Extended SMRAM (E_SMRAM) modes of power management; E_SMRAM mode supports write-back cacheable SMRAM up to 1 Mbyte -- 3.3 V PCI bus control, Rev 2.1 compliant Support single AGP-66 3.3 V device
The Low-Power Module is a small, highly integrated assembly containing an Intel Pentium® II Processor Low-Power and its immediate system-level support. The processor module contains a power supply for the processor's unique voltage requirements, a system Level 2 cache memory, and the core logic required to bridge the processor to standard system buses. The module interfaces electrically to its host system via a 3.3-V PCI bus, a 3.3-V memory bus and some control signals for the Intel 443BX Host Bridge/Controller.
Order Number: 273256-002 February 2000
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Pentium® II processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. MPEG is an international standard for video compression/decompression promoted by ISO. Implementations of MPEG CODECs, or MPEG enabled platforms may require licenses from various entities, including Intel Corporation. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800548-4725 or by visiting Intel's website at http://www.intel.com. Copyright © Intel Corporation, 2000 *Third-party brands and names are the property of their respective owners.
Datasheet
Pentium® II Processor Low-Power Module
Contents
1.0 2.0 3.0 Introduction ......... 7
1.1 Module Terminology.... 7
Architecture Overview ............ 7 Module Connector Interface ........ 10
3.1 Signal Definitions.......10 3.1.1 Signal List.....10 3.1.2 Memory (109 Signals) .......... 11 3.1.3 AGP (60 SIGNALS)........12 3.1.4 PCI (58 SIGNALS) ......... 13 3.1.5 Processor/PIIX4E Sideband (8 Signals).......14 3.1.6 Power Management (7 Signals) .... 15 3.1.7 Clock (9 Signals) ... 16 3.1.8 Voltages (54 Signals) ........... 17 3.1.9 ITP/JTAG (9 Signals) ........... 17 3.1.10 Miscellaneous (82 Signals) ........... 18 Connector Pin Assignments ........ 18 Pin and Pad Assignments .. 20 Low-Power Module....22 L2 Cache .... 22 443BX Host Bridge/Controller ........... 22 4.3.1 Memory Organization ........... 23 4.3.2 Reset Strap Options ....... 23 4.3.3 PCI Interface ......... 24 4.3.4 AGP Interface........24 Electrical Requirements ..... 25 4.4.1 DC Requirements..25 4.4.2 AC Requirements .. 26 4.4.2.1 System Bus Clock (BCLK) Signal Quality Specifications and Measurement Guidelines .......... 27 Module Signal Termination..........28 Processor Core Voltage Regulation ........... 28 4.6.1 Voltage Regulator Efficiency ......... 28 4.6.2 Voltage Regulator Control .... 29 4.6.2.1 Voltage Signal Definition and Sequencing ........ 29 4.6.3 Power Planes: Bulk Capacitance Requirements ... 31 4.6.3.1 V_DC and V_5 Decoupling ....... 32 4.6.4 Surge Current Study.......32 4.6.4.1 Slew-Rate Control: Circuit Description ..... 34 4.6.4.2 Under-Voltage Lockout: Circuit Description ...... 36 4.6.4.3 Over Voltage Lockout: Circuit Description.........36 4.6.4.4 Over Current Protection: Circuit Description ..... 36 Active Thermal Feedback...37 Power Management ........... 37
3.2 3.3
4.0
Functional Description..........22
4.1 4.2 4.3
4.4
4.5 4.6
4.7 4.8
Datasheet
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