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Details, datasheet, quote on part number:IR2132S
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| Part: | IR2132S |
| Category: | Discrete |
| Description: | 3 Phase Driver, Inverting Input, 0.8us Deadtime in a 28-lead Soic Package |
| Company: | International Rectifier Corp. |
| Datasheet: | Download IR2132S datasheet File size : 298 kB |
| Request For quote: | Find where to buy IR2132S
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Datasheet text preview:
Data Sheet No. PD60019-O
IR2130/IR2132 (J)(S)
3-PHASE BRIDGE DRIVER
Features
· Floating channel designed for bootstrap operation · · · · · · · ·
Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent half-bridge drivers Matched propagation delay for all channels 2.5V logic compatible Outputs out of phase with inputs Cross-conduction prevention logic
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) 600V max. 200 mA / 420 mA 10 - 20V 675 & 425 ns
Deadtime (typ.) 2.5 µs (IR2130) 0.8 µs (IR2132)
Description
The IR2130/IR2132(J)(S) is a high voltage, high speed Packages power MOSFET and IGBT driver with three independent high and low side referenced output channels. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 2.5V logic. A ground-referenced 28-Lead SOIC operational amplifier provides analog feedback of bridge current via an external current sense resistor. A current trip function which terminates all six outputs is also 28-Lead PDIP de rived from this resistor. An open drain FAULT signal indicates if an over-current or undervoltage shutdown has occurred. The output drivers feature a high pulse current 44-Lead PLCC w/o 12 Leads buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use at high frequencies. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 600 volts.
Typical Connection
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2130/IR2132 (J)(S)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.
Symbol
VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 V IN
Definition
High Side Floating Supply Voltage High Side Floating Offset Voltage High Side Floating Output Voltage Low Side and Logic Fixed Supply Voltage Logic Ground Low Side Output Voltage Logic Input Voltage (HIN1,2,3 , LIN1,2,3 & ITRIP)
Min.
-0.3 VB1,2,3 - 25 VS1,2,3 - 0.3 -0.3 VCC - 25 -0.3 VSS - 0.3
Max.
625 VB1,2,3 + 0.3 VB1,2,3 + 0.3 25 VCC + 0.3 VCC + 0.3 (V SS + 15) or (VCC + 0.3) whichever is lower VCC + 0.3 VCC + 0.3 VCC + 0.3 50 1.5 1.6 2.0 83 78 63 150 150 300
Units
V
V FLT VCAO V CAdVS/dt PD
FAULT Output Voltage Operational Amplifier Output Voltage Operational Amplifier Inverting Input Voltage Allowable Offset Supply Voltage Transient Package Power Dissipation @ TA +25°C
RthJA
Thermal Resistance, Junction to Ambient
(28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC) (28 Lead DIP) (28 Lead SOIC) (44 Lead PLCC)
TJ TS TL
Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds)
VSS - 0.3 VSS - 0.3 VSS - 0.3 -- -- -- -- -- -- -- -- -55 --
V/ns W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
Symbol
Definition
Min.
Max.
Units
VB1,2,3 High Side Floating Supply Voltage VS1,2,3 + 10 VS1,2,3 + 20 VS1,2,3 High Side Floating Offset Voltage Note 1 600 VHO1,2,3 High Side Floating Output Voltage VS1,2,3 VB1,2,3 VCC Low Side and Logic Fixed Supply Voltage 10 20 VSS Logic Ground -5 5 VLO1,2,3 Low Side Output Voltage 0 VCC V V IN Logic Input Voltage (HIN1,2,3 , LIN1,2,3 & ITRIP) VSS VSS + 5 VFLT VSS VCC FAULT Output Voltage VCAO Operational Amplifier Output Voltage VSS VSS + 5 V CAOperational Amplifier Inverting Input Voltage VSS VSS + 5 TA Ambient Temperature -40 125 °C Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS). (Please refer to the Design Tip DT97-3 for more details). Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.
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IR2130/IR2132 (J)(S)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS1,2,3) = 15V, VS0,1,2,3 = VSS, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics are defined in Figures 3 through 5.
Symbol
ton toff tr tf titrip tbl tflt t flt,in tfltclr DT SR+ SR-
Definition
Turn-On Propagation Delay Turn-Off Propagation Delay Turn-On Rise Time Turn-Off Fall Time ITRIP to Output Shutdown Prop. Delay ITRIP Blanking Time ITRIP to FAULT Indication Delay Input Filter Time (All Six Inputs) LIN1, 2,3 to FAULT Clear Time Deadtime (IR2130) (IR2132) Operational Amplifier Slew Rate (+) Operational Amplifier Slew Rate (-)
Figure Min. Typ. Max. Units Test Conditions
11 12 13 14 15 -- 16 -- 17 18 18 19 20 500 300 -- -- 400 -- 335 -- 6.0 1.3 0.4 4.4 2.4 675 425 80 35 660 400 590 310 9.0 2.5 0.8 6.2 3.2 850 550 125 55 920 -- 845 -- 12.0 3.7 1.2 -- -- VIN = 0 & 5V VS1,2,3 = 0 to 600V VIN, VITRIP = 0 & 5V VITRIP = 1V VIN, VITRIP = 0 & 5V VIN = 0 & 5V VIN, VITRIP = 0 & 5V VIN = 0 & 5V
ns
µs V/µs
NOTE: For high side PWM, HIN pulse width must be 1.5µsec
Static Electrical Characteristics
VBIAS (VCC, V BS1,2,3) = 15V, VS0,1,2,3 = VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six logic input leads: HIN1,2,3 & LIN1,2,3 . The VO and IO parameters are referenced to VS0,1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.
Symbol
VIH VIL VIT,TH+ VOH VOL ILK IQBS IQCC IIN+ IINIITRIP+ IITRIPVBSUV+ VBSUVVCCUV+ VCCUVRon,FLT
Definition
Logic "0" Input Voltage (OUT = LO) Logic "1" Input Voltage (OUT = HI) ITRIP Input Positive Going Threshold High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Quiescent VCC Supply Current Logic "1" Input Bias Current (OUT = HI) Logic "0" Input Bias Current (OUT = LO) "High" ITRIP Bias Current "Low" ITRIP Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold FAULT Low On-Resistance
Figure Min. Typ. Max. Units Test Conditions
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 2.2 -- 400 -- -- -- -- -- -- -- -- -- 7.5 7.1 8.3 8.0 -- -- -- 490 -- -- -- 15 3.0 450 225 75 -- 8.35 7.95 9.0 8.7 55 -- 0.8 580 100 100 50 30 4.0 650 400 150 100 9.2 8.8 9.7 9.4 75 V V
mV µA mA µA nA
VIN = 0V, IO = 0A VIN = 5V, IO = 0A VB = VS = 600V VIN = 0V or 5V VIN = 0V or 5V VIN = 0V VIN = 5V ITRIP = 5V ITRIP = 0V
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