The Radiation Hardened is a Dual 4-Channel Multiplexer having two common binary control inputs for selecting of 4 data channels. All inputs and outputs are buffered and are designed for balanced propagation delay and transition times. Separate Output Enable inputs are provided to ease system design. When or OE2 are set HIGH, the corresponding output is configured into a high impedance state. The ACS253MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the ACS253 are contained in SMD 5962-98007. A "hot-link" is provided on our homepage with instructions for downloading. http://www.intersil.com/data/sm/index.htm

· QML Qualified Per MIL-PRF-38535 Requirements· 1.25Micron Radiation Hardened SOS CMOS· Radiation Environment - Latch-up Free Under any Conditions - Total Dose. x 105 RAD(Si) - SEU Immunity. x 10-10 Errors/Bit/Day - SEU LET Threshold. >100MeV/(mg/cm2)· Input Logic Levels.VIL = (0.3)(VCC), VIH = (0.7)(VCC)· Output Current. ±8mA· Quiescent Supply Current. 400µs· Propagation Delay - Enable to Output. 12ns - Input or Address to Output. 15ns

SMD PART NUMBER 5962F9800701VEC N/A 5962F9800701VXC N/A INTERSIL PART NUMBER ACS253K/Sample-02 ACS253HMSR-02 TEMP. RANGE (oC) 125 25 PACKAGE 16 Ld SBDIP 16 Ld SBDIP 16 Ld Flatpack 16 Ld Flatpack Die CASE OUTLINE CDIP2-T16 CDFP4-F16 N/A

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 321-724-7143 | Copyright © Intersil Corporation 1999

DIE DIMENSIONS: Size: 2390µm (94 mils x 94 mils) Thickness: ±25µm (20.6 mils ±1 mil) Bond Pad: 110µm (4.3 mils x 4.3 mils) METALLIZATION: Type: Al Metal 1 Thickness: 0.7µm ±0.1µm Metal 2 Thickness: 1.0µm ±0.1µm SUBSTRATE Silicon on Sapphire (SOS) SUBSTRATE POTENTIAL: Unbiased Insulator BACKSIDE FINISH: Sapphire PASSIVATION: Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30µm ±0.15µm SPECIAL INSTRUCTIONS: Bond VCC First ADDITIONAL INFORMATION: Worst Case Density: 105 A/cm2 Transistor Count: 140

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