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Part: 82C284/883
Category:
Timing Circuits
-> Clock Generators
-> Application Specific PLL
Description: Clock Generator And Ready Interface For 80C286 Processors
Company: Intersil Corporation
Datasheet: Download 82C284/883 datasheet File size : 1163 kB
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®
82C284/883
Clock Generator and Ready Interface for 80C286 Processors
Description
The Intersil 82C284/883 is a clock generator/driver which provides clock signals for 80C286 processors and support components. It also contains logic to supply READY to the CPU from either asynchronous or synchronous sources and synchronous RESET from an asynchronous input with hysteresis.
March 1997
Features
· This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. · Generates System Clock for 80C286 Processors · Generates System Reset Output from Schmitt Trigger Input - Improved Hysteresis · Uses Crystal or External Signal for Frequency Source - Dynamically Switchable Between Two Input Frequencies · Provides Local READY and MULTIBUSTM READY Synchronization · Static CMOS Technology · Single +5V Power Supply · Available in 18 Lead CERDIP Package
Ordering Information
PART NUMBER MD82C284-12/883 TEMP. RANGE PACKAGE PKG. NO. F 18.3 -55oC to +125oC CERDIP
Functional Diagram
Pinout
82C284 /883 (CERDIP) TOP VIEW
AR DY SRDY SRDYEN READY EFI F/C X1 X2 GND 1 2 3 4 5 6 7 8 9 18 VCC 17 ARDYEN 16 S1 15 S0 14 NC 13 PCLK 12 RESET 11 RES 10 CLK ARDYEN ARDY SRDYEN SRDY S1 S0 SYNCHRONIZER EFI F/ C RESET RES SYNCHRONIZER X1 X2 RESET
XTAL OSC MUX CLK
READY LOGIC
READY
PCLK GENERATOR
PCLK
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved 1 All other trademarks mentioned are the property of their respective owners.
FN2968.1
82C284/883
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V Input, Output or I/O Voltage Applied. . . . . GND -0.1V to VCC +1.0V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance CERDIP Package . . . . . . . . . . . . . .
JA (oC/W) JC (oC/W)
80 20
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 Gates Storage Temperature Range . . . . . . . . . . . . . . . . .-65oC to +150oC Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
CAUTION: Stresses above those listed in the "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied.
Operating Conditions
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC Operating Supply Voltage. . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V EFI Rise Time (From 0.8V to 3.2V). . . . . . . . . . . . . . . . . . 8ns (Max) EFI Fall Time (From 3.2V to 0.8V) . . . . . . . . . . . . . . . . . . 8ns (Max)
TABLE 1. 82C284/883 D.C. ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested. PARAMET ER Input LOW Voltage Input HIGH Voltage EFI, F/C Input High Voltage RES HIGH Voltage RES Input Hysteresis RESET, PCLK Output LOW Voltage RESET, PCLK Output Voltage READY Output LOW Voltage CLK Output LOW Voltage CLK Output HIGH Voltage Input Leakage Current Active Power Supply Current NOTES: 1. ICCOP measured at 10MHz for the 82C284-10/883 and at 12.5MHz for the 82C284-12/883. VIN = GND or VCC, VCC = 5.5V, outputs unloaded. 2. Interchanging of force and sense conditions is permitted. TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet waveforms, unless otherwise specified. (NOTE 1) CONDITIONS At VCC/2, Note 8 At VCC/2, Note 8 GROUP A SUBGROUP 9, 10, 11 9, 10, 11 10MHz TEMPERATURE -55oC TA +125oC -55oC TA +125oC MIN 20 20 M AX 12MHz MIN 16 20 M AX UNITS ns ns SYMBOL VIL VIH VIHC V IHR VHYS VOL VOH VOLR VOLC VOHC II ICCOP CONDITIONS VCC = 4.5V VCC = 5.5V VCC = 5.5V VCC = 5.5V VCC = 5.5V IOL = 5mA, VCC = 4.5V, Note 2 IOH = -1mA, VCC = 4.5V, Note 2 IOH = 10mA, VCC = 4.55V, Note 2 IOL = 5mA, VCC = 4.5V, Note 2 IOH = -5mA, VCC = 4.5V, Note 2 VIN = GND or VCC, VCC = 5.5V 82C284-10/883, Note 1 82C284-12/883, Note 1 GROUP A SUBGROUPS 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 TEMPERATURE -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC MIN 2 .2 3 .2 VCC -0.8 0 .5 VCC -0.4 VCC -0.4 -10 MAX 0 .8 0 .4 0 .4 0 .4 10 48 60 UNITS V V V V V V V V V V µA mA mA
PARAMET ER EFI LOW Time EFI HIGH Time
SYMBOL t1 t2
2
82C284/883
TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet waveforms, unless otherwise specified. (Continued) (NOTE 1) CONDITIONS GROUP A SUBGROUP 9, 10, 11 10MHz TEMPERATURE -55oC TA +125oC MIN 20 M AX 12MHz MIN 18 M AX UNITS ns
PARAMET ER Status Setup Time for Status Going Active Status Setup Time for Going Inactive Status Hold Time F/C Setup Time F/C Hold Time SRDY or SRDYEN Setup Time SRDY or SRDYEN Hold Time ARDY or ARDYEN Setup Time ARDY or ARDYEN Hold Time RES Setup Time RES Hold Time CLK Period CLK LOW Period CLK HIGH Time READY Inactive Delay READY Active Delay PCLK Delay RESET Delay PCLK LOW Time PCLK HIGH Time
SYMBOL t5A
t5B t6 t7 t8 t9 t10 t11 t12 t13 t14 t16 t17 t18 t21 t22 t 23 t24 t25 t26 Notes 2, 6 Notes 2, 6 At 0.8V, Note 4, Test Condition 2 At 0.8V, Note 4 CL = 75pF, Test Condition 1 CL = 75pF, Test Condition 3 CL = 75pF, Note 5 CL = 75pF, Note 5 Note 3 Note 3 Notes 3, 7 Notes 3, 7
9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11 9, 10, 11
-55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC
20 1 15 15 15 2 5 30 20 10 50 12 16 5 t 1610 t 1610
24 20 27 -
16 1 15 15 15 2 5 25 18 8 40 11 13 5 t 16 10 t 16 10
18 16 26 -
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
3
82C284/883
TABLE 2. 82C284/883 A.C. ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) Device Guaranteed and 100% Tested. A.C. timings are referenced to 0.8V and 2.0V points of the signals as illustrated in datasheet waveforms, unless otherwise specified. (Continued) (NOTE 1) CONDITIONS GROUP A SUBGROUP 10MHz TEMPERATURE MIN M AX 12MHz MIN M AX UNITS
PARAMET ER NOTES:
SYMBOL
1. VCC = 4.5V and 5.5V unless otherwise specified. CLK loading: CL = 100pF. 2. With the internal crystal oscillator using recommended crystal and capacitive loading; or with the EFI input meeting specifications t1 and t2. The recommended crystal loading for CLK frequencies of 8MHz to 20MHz are 25pF from pin X1 to GND, and 15pF from pin X2 to GND; for CLK frequencies from 20MHz to 25MHz the recommended loading is 15pF from pin X1 to GND, and 15pF from X2 to GND. These recommended values are ±5pF and include all stray capacitance. Decouple VCC and GND as close to the 80C284/883 as possible. 3. This is an asychronous input. This specification is given for testing purposes only, to assure recognition at a specific CLK edge. 4. The pull-up resistor value for the READY pin is 620 with the rated 150pF load. 5. t16 refers to any allowable CLK period. 6. When using a crystal with the recommended capacitive loading, CLK output HIGH and LOW times are guaranteed to meet 80C286 requirements. 7. Measured from 1.0V on the CLK to 0.8V on the RES waveform for RES active, and to 4.2V on the RES waveform for RES inactive. 8. Input test waveform characteristics: VIL= 0.0V, VIH = 4.5V. TABLE 3. 82C284/883 ELECTRICAL PERFORMANCE SPECIFICATIONS 10MHz PARAMET ER Input Capacitance SYMBOL CIN CONDITIONS FREQ = 1MHz, All measurements are referenced to device GND NOTES 1 TEMPERATURE TA = +25oC MIN M AX 10 12MHz MIN M AX 10 UNITS pF
EFI HIGH to CLK LOW Delay EFI LOW to CLK HIGH Delay CLK Rise Time
t15A
1, 2
-55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC -55oC TA +125oC
-
30
-
25
ns
t15B
1, 3
-
35
-
30
ns
t19
1.0V to 3.6V, CL = 100pF 3.6V to 1.0V, CL = 100pF
1
-
8
-
8
ns
CLK Fall Time
t20
1
-
8
-
8
ns
X1 HIGH to CLK NOTES:
t27
1, 4
-
35
-
30
ns
1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are characterized upon initial design and after major process and/or design changes. 2. Measured from 3.2V on the EFI waveform to 1.0V on the CLK. 3. Measured from 0.8V on the EFI waveform to 3.6V on the CLK. 4. Measured from 3.6V on the X1 input to 3.6V on the CLK. TABLE 4. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test Interim Test METHOD 100% /5004 100% /5004 SUBGROUPS 1, 7, 9
4
82C284/883
TABLE 4. APPLICABLE SUBGROUPS CONFORMANCE GROUPS PDA Final Test Gr oup A Groups C & D METHOD 100% 100% Samples/5005 SUBGROUPS 1 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 7, 9
A.C. Test Conditions
TEST CONDITION
VCC
RL 750 620
CL 75 pF 15 0pF 75 pF
1
RL
2 3
DEVICE O U TP U T CL
A.C. Specifications
EFI INPUT 3.2V 0.8V tDELAY (MAX) VCC - 0.4V CLK OUTPUT tSETUP tHOLD 3.2V 3.2V F/C INPUT 0.8V 0.8V 3.8V 0.4V 3.6V 1.0V 3.6V 1.0V 0.4V 3.8V 0.4V
VCC - 0.8V RES INPUT 0.8V 0.8V
VCC - 0.4V 0.4V
2.6V OTHER DEVICE INPUT 2.0V 0.8V tDELAY (MAX) tDELAY (MIN) DEVICE OUTPUT 2.0V 0.8V 2.0V 0.8V 0.4V
FIGURE 1. A.C. DRIVE, SETUP, HOLD AND DELAY TIME MEASUREMENT POINTS
5
Others parts begin by 82
82-1 82-2
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