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Part: DG406DY
Category:
Analog & Mixed-Signal Processing
-> Switches & Multiplexers
-> Analog Multiplexers/Demultiplexers
Description: Single 16-Channel/Differential 8-Channel, CMOS Analog Multiplexers
Company: Intersil Corporation
Datasheet: Download DG406DY datasheet File size : 304 kB
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DG406, DG407
TM
D a ta Sheet
Au g u s t 2000
F i l e Number
3116.6
Single 16-Channel/Differential 8-Channel, CMOS Analog Multiplexers
The DG406 and DG407 monolithic CMOS analog multiplexers are drop-in replacements for the popular DG506A and DG507A series devices. They each include an array of sixteen analog switches, a TTL and CMOS compatible digital decode circuit for channel selection, a voltage reference for logic thresholds, and an ENABLE input for device selection when several multiplexers are present. These multiplexers feature lower signal ON resistance (<100) and faster transition time (tTRANS < 300ns) compared to the DG506A and DG507A. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG406 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 30VP-P signals when operating with ±15V power supplies. The sixteen switches are bilateral, equally matched for AC or bidirectional signals. The ON resistance variation with analog signals is quite low over a ±5V analog input range.
Features
· ON-Resistance (Max). . . . . . . . . . . . . . . . . . . . . . . . 100 · Low Power Consumption (PD) . . . . . . . . . . . . . . <1.2mW · Fast Transition Time (Max) . . . . . . . . . . . . . . . . . . . . 300ns · Low Charge Injection · TTL, CMOS Compatible · Single or Split Supply Operation
Applications
· Battery Operated Systems · Data Acquisition · Medical Instrumentation · Hi-Rel Systems · Communication Systems · Automatic Test Equipment
Related Literature
· Technical Brief TB363 "Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)"
Ordering Information
PART NUMBER DG406DJ DG406DY DG407DJ DG407DY DG407DN TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 28 Ld PDIP 28 Ld SOIC 28 Ld PDIP 28 Ld SOIC 28 Ld PLCC PKG. NO. E28.6 M28.3 E28.6 M28.3 N28.45
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
DG406, DG407 Pinouts
DG406 (PDIP, SOIC) TOP VIEW
V+ 1 NC 2 NC 3 S16 4 S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11 GND 12 NC 13 A3 14 28 D 27 V26 S8 25 S7 24 S6 23 S5 22 S4 21 S3 20 S2 19 S1 18 EN 17 A0 16 A1 15 A2
DG407 (PDIP, SOIC) TOP VIEW
V+ 1 DB 2 NC 3 S8B 4 S7B 5 S6B 6 S5B 7 S4B 8 S3B 9 S2B 10 S1B 11 GND 12 NC 13 NC 14 28 DA 27 V26 S8A 25 S7A 24 S6A 23 S5A 22 S4A 21 S3A 20 S2A 19 S1A 18 EN 17 A0 16 A1 15 A2
DG407 (PLCC) TOP VIEW
+VSUPPLY -VSUPPLY 27
S8B
DB
4
3
2
1
28
26
S7B 5 S6B 6 S5B 7 S4B 8 S3B 9 S2B 10 S1B 11
S8A
NC
DA
25 S7A 24 S6A 23 S5A 22 S4A 21 S3A 20 S2A 19 S1A
12 GND
13 NC
14 NC
15 A2
16 A1
17 A0
18 ENABLE
2
DG406, DG407 Schematic Diagram (Typical Channel)
V+ GND VREF D A0 V+ AX LEVEL SHIFT DECODE/ DRIVE V-
S1
V+ EN SN V-
Functional Diagrams
DG406
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 TO DECODER LOGIC CONTROLLING BOTH TIERS OF MUXING ADDRESS DECODER 1 OF 16 D S1B S2B S3B S4B S5B S6B S7B S8B TO DECODER LOGIC CONTROLLING BOTH TIERS OF MUXING ENABLE ADDRESS DECODER 1 OF 8 DB S1A S2A S3A S4A S5A S6A S7A S8A DA
DG407
ENABLE
A0
A1
A2
A3
EN
A0
A1
A2
EN
3
DG406, DG407
DG406 TRUTH TABLE A3 X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 DG407 TRUTH TABLE A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH PAIR None 1 2 3 4 5 6 7 8
Logic "0" = VAL 2.4V. X = Don't Care.
4
DG406, DG407
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44.0V GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Digital Inputs, VS , VD (Note 1). . . . . . (V-) -2V to (V+) +2V or 20mA, Whichever Occurs First Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 100mA
Thermal Information
Thermal Resistance (Typical, Note1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (PLCC and SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. Signals on SX , DX , EN or AX exceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings.
Electrical Specifications
PARAMETER DYNAMIC CHARACTERISTICS Transition Time, tTRANS
Test Conditions: V+ = +15V, V- = -15V, VAL = 0.8V, VAH = 2.4V Unless Otherwise Specified TEST CONDITIONS TEMP (oC) (NOTE 3) MIN (NOTE 4) TYP (NOTE 3) MAX UNITS
(See Figure 1)
25 Full
25 10 -
200 50 150 70 40 -69 7 8
300 400 200 400 150 300 -
ns ns ns ns ns ns ns ns pC dB pF pF
Break-Before-Make Interval, tOPEN Enable Turn-ON Time, tON(EN) Enable Turn-OFF Time, tOFF(EN) Charge Injection, Q OFF Isolation, OIRR Logic Input Capacitance, CIN Source OFF Capacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) DG406 DG407 Drain ON Capacitance, CD(ON) DG406 DG407 DIGITAL INPUT CHARACTERISTICS Logic High Input Voltage, VINH Logic Low Input Voltage, VINL Logic High Input Current, IAH Logic Low Input Current, IAL ANALOG SWITCH CHARACTERISTICS Drain-Source ON Resistance, rDS(ON) rDS(ON) Matching Between Channels, rDS(ON)
(See Figure 3)
25 Full
(See Figure 2)
25 Full 25 Full
CL = 1nF, VS = 0V, RS = 0 VEN = 0V, RL = 1k, f = 100kHz (Note 7) f = 1MHz VEN = 0V, VS = 0V, f = 1MHz VEN = 0V, VD = 0V, f = 1MHz
25 25 25 25
25 25
-
160 80 180 90
-
pF pF pF pF
VEN = 5V, VD = 0V, f = 1MHz
25 25
Full Full VA = 2.4V, 15V VEN = 0V, 2.4V, VA = 0V VD = ±10V, IS = +10mA (Note 5) VD = 10V, -10V (Note 6) Full Full
2.4 -1 -1
-
0.8 1 1
V V µA µA %
25 Full 25
-
50 5
100 125 -
5
Others parts begin by dg
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