Digchip : Database on electronics components
Electronic components database
Search:                      In section:
Member, Distributor  
Log In
Email:
Password:

Details, datasheet, quote on part number:HS-1120RH
 
 
Part:HS-1120RH
Category:Analog & Mixed-Signal Processing => Amplifiers => Operational Amplifiers => Current Mode/Feedback
Description:Radiation Hardened, Ultra High Speed Current Feedback Amplifier With Offset Adjust
Company:Intersil Corporation
Datasheet:Download HS-1120RH datasheet   File size : 125 kB
Request For quote:  Find where to buy HS-1120RH
 



Datasheet text preview:
HS-1120RH
August 1996
Radiation Hardened, Ultra High Speed Current Feedback Amplifier with Offset Adjust
Description
The HS-1120RH is a radiation hardened, high speed, wideband, fast settling current feedback amplifier. These devices are QML approved and are processed and screened in full compliance with MIL-PRF-38535. Built with Intersil' proprietar y, complementary bipolar UHF-1 (DI bonded wafer) process, it is the fastest monolithic amplifier available from any semiconductor manufacturer. The HS-1120RH's wide bandwidth, fast settling characteristic, and low output impedance, make this amplifier ideal for driving fast A/D converters. Additionally, it offers offset voltage nulling capabilities as described in the "Offset Adjustment" section of this datasheet. Component and composite video systems will also benefit from this amplifier's performance, as indicated by the excellent gain flatness, and 0.03%/0.05 Degree Differential Gain/Phase specifications (RL = 75). Detailed electrical specifications are contained in SMD 5962F9675601VPA, available on the Intersil Website or AnswerFAX systems (document #967560) A Cross Reference Table is available on the Intersil Website for conversion of Intersil Part Numbers to SMDs. The address is (http://www.intersil.com/datasheets/smd/smd_xref. html). SMD numbers must be used to order Radiation Hardened Products.
Features
· Electrically Screened to SMD 5962F9675601VPA · MIL-PRF-38535 Class V Compliant · Low Distortion (HD3, 30MHz) . . . . . . . . . . -84dBc (Typ) · Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ) · Very High Slew Rate . . . . . . . . . . . . . . . 2300V/µs (Typ) · Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns (Typ) · Excellent Gain Flatness (to 50MHz) . . . . . 0.05dB (Typ) · High Output Current . . . . . . . . . . . . . . . . . . 65mA (Typ) · Fast Overdrive Recovery. . . . . . . . . . . . . . . <10ns (Typ) · Total Gamma Dose. . . . . . . . . . . . . . . . . . 300K RAD (Si) · Latch Up . . . . . . . . . . . . . . . . . . . None (DI Technology)
Applications
· Video Switching and Routing · Pulse and Video Amplifiers · Wideband Amplifiers · RF/IF Signal Processing · Flash A/D Driver · Imaging Systems
Ordering Information
PART NUMBER 5962F9675601VPA HFA1100IJ (Sample) HFA11XXEVAL TEMP. RANGE (oC) -55 to 125 -40 to 85 PACKAGE 8 Ld CERDIP 8 Ld CERDIP PKG. NO. GDIP1-T8 F8.3A
Evaluation Board
Pinout
HS-1120RH MIL-STD-1835, GDIP1-T8 (CERDIP) TOP VIEW
BAL -IN +IN V-
1 2 3 4
8
NC V+ OUT BAL
+
7 6 5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
4101.1
1
HS-1120RH Application Information
Optimum Feedback Resistor The enclosed plots of inverting and non-inverting frequency response illustrate the performance of the HS-1120RH in various gains. Although the bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF . All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF . The HS-1120RH design is optimized for a 510 RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a tradeoff of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth.
GAIN (ACL) -1 +1 +2 +5 +10 +19 BANDWIDTH (MHz) 580 850 670
RS () 50 45
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL for m a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 850MHz. By decreasing RS as CLincreases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. Even so, bandwidth does decrease as you move to the right along the curve. For example, at AV = +1, RS = 50, CL = 30pF, the overall bandwidth is limited to 300MHz, and bandwidth drops to 100MHz at AV = +1, RS = 5, CL = 340pF.
RF () 430 510 360 150 180 270
40 35 30 25 20 15 10
AV = +1
520 240 125
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10µF) tantalum in parallel with a small value (0.1µF) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible. An example of a good high frequency layout is the Evaluation Board shown in Figure 2.
5 A = +2 V 0 0 40 80 120 160 200 240 280 320 360 400 LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE
Evaluation Board
The performance of the HS-1120RH may be evaluated using the HFA11XXEVAL Evaluation Board. The layout and schematic of the board are shown in Figure 2. To order evaluation boards, please contact your local sales office.
Offset Adjustment
The output offset voltage of the HS-1120RH may be nulled via connections to the BAL pins. Unlike a voltage feedback amplifier, offset adjustment is accomplished by varying the sign and/or magnitude of the inverting input bias current (-IBIAS). With voltage feedback amplifiers, bias currents are matched and bias current induced offset errors are nulled by matching the impedances seen at the positive and negative inputs. Bias
2
HS-1120RH
currents are uncorrelated on current feedback amplifiers, so this technique is inappropriate. -IBIAS flows through RF causing an output offset error. Likewise, any change in -IBIAS forces a corresponding change in output voltage, providing the capability for output offset adjustment. By nulling -IBIAS to zero, the offset error due to this current is eliminated. In addition, an adjustment limit greater than the -IBIAS limit allows the user to null the contributions from other error sources, such as VIO, or +IN source impedance. For example, the excess adjust current of 50µA [IBNADJ (Min) - IBSN (Max)] allows for the nulling of an additional 26mV of output offset error (with RF = 510) at room temperature. The amount of adjustment is a function of RF , so adjust range increases with increased RF . If allowed by other considerations, such as bandwidth and noise, RF can be increased to provide more adjustment range. The recommended offset adjustment circuit is shown in Figure 3.
500 R1 1 50 IN 10µF 0.1µF 2 3 4 -5V
500 VH 8 7 6 5 GND GND 0.1µF 50 OUT VL 10µF +5V
FIGURE 2A. SCHEMATIC
VH 1 +IN VL OUT V+ VGND
FIGURE 2B. TOP LAYOUT
FIGURE 2C. BOTTOM LAYOUT
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
510
2
-
6
VIN
HS-1120RH 3+ 5 1 4 10K
VOUT
V-
FIGURE 3. OFFSET VOLTAGE ADJUSTMENT CIRCUIT
3