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Details, datasheet, quote on part number:HSP50415EVAL1
 
 
Part:HSP50415EVAL1
Category:Communication => Wireless => Commlink
Description:Wideband Programmable Modulator (WPM)
Company:Intersil Corporation
Datasheet:Download HSP50415EVAL1 datasheet   File size : 181 kB
Request For quote:  Find where to buy HSP50415EVAL1
 



Datasheet text preview:
HSP50415
TM
D a ta Sheet
M a rch 2000
F i l e Number
4559.5
Wideband Programmable Modulator (WPM)
The HSP50415 Wideband Programmable Modulator (WPM) is a quadrature amplitude modulator/upconverter designed for wideband digital modulation. The WPM combines shaping and inter polation filters, a complex modulator, timing and carrier NCOs and dual DACs into a single package. The HSP50415 supports vector modulation, accepting up to 16-bit In phase (I) and Quadrature (Q) samples to generate virtually any quadrature AM or PM modulation format. A constellation mapper and 24 Symbol span interpolation shaping filter is provided for the input baseband signals. Gain adjustment is provided after the shaping FIR filter. A timing error generator in the input section allows the on-chip timing NCO to track the input timing. The WPM includes a Numerically Controlled Oscillator (NCO) driven interpolation filter, which allows the input and output sample rate to have a non-integer or variable relationship. This re-sampling feature simplifies use of sample rates that do not have harmonic or integer frequency relationships to the input data rate and decouples the carrier from the DATACLK. A complex quadrature modulator modulates the baseband data on a programmable carrier center frequency. The WPM offers digital output spurious Free Dynamic Range (SFDR) that exceeds 70dB at the maximum output sample rate of 100MSPS, for input sample rates as high as 25MSPS. X/SIN(X) rolloff compensation filtering is provided. Real 14-bit digital output data is available prior to the 12-bit DACs providing 20mA full scale output current.
Features
· Output Sample Rates . . . . . . . . . . . . . . . . . . to 100MSPS · Input Data Rates . . . . . . . . . . . . . . . . Up to 25MSPS (I/Q) · 32-Bit Programmable Carrier NCO · X/SIN(X) Rolloff Compensation · Programmable I and Q Shaping FIR Filters: - Up to 24 Symbol Span · Fixed or NCO Controlled Interpolation: - Inter polation Range . . . . . . . . . . . . . . . . . . 4 to > 128K - Digital PLL to Lock to Input Symbol Clock · Digital Signal Processing Capable of >70dB SFDR · Dual 12-bit D/A Processing Capable of >50 dB SFDR
Applications
· Wide-Band Digital Modulation · Base Station Modulators · HSP50415EVAL1 Evaluation Board Available
Ordering Information
PART NUMBER HSP50415VI TEMP RANGE (oC) -40 to 85 PACKAGE 100 Ld MQFP PKG. NO Q100.14x20
HSP50415EVAL1 Evaluation CCA, Development S/W, and User's Manual
Block Diagram
W/R CONTROL
µP INTERFACE
CARRIER NCO COS SIN X SIN(X) 14 / 12-BIT DAC
DIGITAL OUT I OUT
DATA
DATA INTERFACE/ FIFO
I
CONST MAP
SHAPING/ INTERPOLATION FILTERS
COMPLEX MIXER
DATACLK
Q
SHAPING/ INTERPOLATION FILTERS
X SIN(X)
12-BIT DAC
Q OUT
2XSYMCLK REFCLK
SYMBOL NCO/ DIGITAL PLL
CLK MULTIPLIER ANALOG PLL
CLK
3-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
Functional Block Diagram
CE WR RD RESET ADDR CDATA INTREQ
µP INTERFACE CARRIER NCO x2, 4, 8, 16 I GAIN x2 INTERPOLATION INTERPOLATION x2 TO > 8192 INTERPOLATION INTERPOLATION FILTER FIR BYPASS Q GAIN HALFBAND BYPASS BYPASS I GAIN COS SIN X SIN(X) BYPASS Q GAIN Q OFFSET I OFFSET 14 / 12-BIT DAC
3-2
IOUT IOUTA IOUTB ICOMP1 ICOMP2 QCOMP2 QCOMP1
DIN ISTRB DATACLK TXEN FEMPT FOVRFL FFULL
I
CONST. MAP
COMPLEX MIXER
DATA INTERFACE/ FIFO
HSP50415
Q FIR BYPASS 2XSYMCLK X2 BYPASS HALFBAND BYPASS
INTERPOLATION FILTER
X SIN(X) BYPASS
12-BIT DAC
QOUTA QOUTB
BYPASS
SYSCLK
LOCKDET
REFCLK
PHASE FREQ. ERROR DETECT
LOOP FILTER
SYMBOL NCO
LOCK DETECTOR
CLK DIVIDER ÷ 1, 2, 4, 8
PHASE FREQUENCY DETECTOR
CHARGE PUMP
PLLRC
REFLO REFIO FSADJ SYSCLK/2 VOLTAGE REF SYSCLK
CLK MULTIPLIER X 1, 2, 4, 8, 16, 32 (VCO DIVIDER) APLL SELECTOR BYPASS
VOLTAGE CONTROLLED OSCILLATOR
÷2
CLK
HSP50415 Pinout
100 LEAD MQFP
TOP VIEW
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 CDATA0 CDATA1 CDATA2 VDD CDATA3 CDATA4 GND CDATA5 CDATA6 CDATA7 RD WR GND CE ADDR0 ADDR1 ADDR2 REFCLK 2XSYMCLK INTREQ NC VDD RESET CLK GND DVDD DGND PLLRC PGND PVDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 DIN15 ISTRB TXEN LOCKDET FOVRFL FEMPTY FFULL GND SYSCLK/2 IOUT13 VDD IOUT12 IOUT11 IOUT10 IOUT9 IOUT8 GND IOUT7 IOUT6 VDD IOUT5 IOUT4 IOUT3 IOUT2 IOUT1 IOUT0 GND VDD RESV RESV
3-3
DVDD DGND QOUTB QOUTA AGND AVDD QCOMP1 QCOMP2 REFLO AGND REFIO FSADJ ICOMP2 AVDD ICOMP1 IOUTA IOUTB AGND RESV RESV
DATACLK DIN0 DIN1 DIN2 DIN3 GND DIN4 VDD DIN5 DIN6 DIN7 DIN8 DIN9 DIN10 DIN11 DIN12 GND VDD DIN13 DIN14
HSP50415
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