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Part: IXBD4410PI
Category:
Discrete
-> Bridges
-> Half
Description: Full-feature Low-side Driver
Company: IXYS Corporation
Datasheet: Download IXBD4410PI datasheet File size : 373 kB
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Datasheet text preview:
IXBD4410 IXBD4411
ISOSMARTTM Half Bridge Driver Chipset
Type Description Package Temperature Range
IXBD4410PI IXBD4411PI IXBD4410SI IXBD4411SI
Full-Feature Low-Side Driver 16-Pin P-DIP Full-Feature High-Side Driver 16-Pin P-DIP Full-Feature Low-Side Driver 16-Pin SO Full-Feature High-Side Driver 16-Pin SO
-40 to +85°C -40 to +85°C -40 to +85°C -40 to +85°C
The IXBD4410/IXBD4411 ISOSMART chipset is designed to control the gates of two Power MOSFETs or Power IGBTs that are connected in a halfbridge (phase-leg) configuration for driving multiple-phase motors, or used in applications that require half-bridge power circuits. The IXBD4410/ IXBD4411 is a full-feature chipset consisting of two 16-Pin DIP or SO devices interfaced and isolated by two small-signal ferrite pulse transformers. The small-signal transformers provide greater than 1200 V isolation. Even with commutating noise ambients greater than ±50 V/ns and up to 1200 V potentials, this chipset establishes error-free two-way communications between the system ground-reference IXBD4410 and the inverter output-
reference IXBD4411. They incorporate undervoltage VDD or VEE lockout and overcurrent or desaturation shutdown to protect the IGBT or Power MOSFET devices from damage. The chipset provides the necessary gate drive signals to fully control the grounded-source low-side power device as well as the floating-source high-side power device. Additionally, the IXBD4410/4411 chipset provides a negative-going, off-state gate drive signal for improved turn-off of IGBTs or Power MOSFETs and a system logiccompatible status fault output FLT to indicate overcurrent or desaturation, and undervoltage VDD or VEE. During a status fault, both chipset keep their respective gate drive outputs off; at VEE.
Features V or greater low-to-high side isolation. Drives Power Systems Operating on up to 575 V AC mains dv/dt immunity of greater than ±50V/ns Proprietary low-to-high side level translation and communication On-chip negative gate-drive supply to ensure Power MOSFET or IGBT turn-off and to prevent gate noise interference 5 V logic compatible HCMOS inputs with hysteresis Available in either the 16-Pin DIP or the 16-Pin wide-body, small-outline plastic package 20 ns switching time with 1000 pF load; 100 ns switching time with 10,000 pF load 100 ns propagation delay time 2 A peak output drive capability Self shut-down of output in response to over-current or short-circuit Under-voltage and over-voltage VDD lockout protection Protection from cross conduction of the half bridge Logic compatible fault indication from both low and high-side driver
1200
Applications
540 V-
or 3-Phase Motor Controls Mode Power Supplies (SMPS) Uninterruptible Power Supplies (UPS) Induction Heating and Welding Systems Switching Amplifiers General Power Conversion Circuits
1Switch
IXYS reserves the right to change limits, test conditions and dimensions.
© 2000 IXYS All rights reserved
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IXBD4410 IXBD4411
Symbol VDD/VEE Vin Iin Io (rev) PD TA TJ M Tstg TL Definition Supply Voltage Input Voltage (INH, INL) Input Current (INL, INH, IM) Peak Reverse Output Current (OUT) Maximum Power Dissipation Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Range Lead Soldering Temperature for 10 s Maximum Ratings -0.5 ... 24 -0.5...VDD +0.5 ± 10 2 600 -40 ... 85 150 -55 ... 150 300 V V A A mW °C °C °C °C Dimensions in inch (1" = 25.4 mm) 16-Pin SO
Recommended Operating Conditions VDD/VEE VDD/LG LGh/LGl Supply Voltage Maximum Common Mode dv/dt 10 ... 20 V 10 ... 16.5 V ± 50 V/ns
Symbol
Definition/Condition Characteristic Values (TA = 25°C, VDD = 15 V, unless otherwise specified) min. typ. max.
INL, INH Inputs (referred to LG) Vt+ VtVih Iin Cin Positive-Going Threshold Negative-Going Threshold Input Hysteresis Input Leakage Current/Vin=VDD or LG Input Capacitance 3.65 1 1 -1 10 1 V V V µA pF 16-Pin Plastic DIP
Open Drain Fault Output (referred to LG) Voh Vol HI Output/Rpu = 10 k to VDD LO Output/Io = 4 mA VDD-0.05 0.3 0.5 V V
OUT Output (referred to LG) Voh Vol Ro Ro Ipk HI Output/Io = -5 mA LO Output/Io = 5 mA Output HI Res./Io = -0.1 A Output LO Res./Io = 0.1 A Peak Output Current/CL = 10 nF VDD-0.05 VEE+0.05 3 3 2 V V A
5 4
1.5
Cross view
IM Input (referred to KG) Vt+ Cin Rs Positive-Going Threshold Input Capacitance Shorting Device Output Resistance 0.24 50 0.3 10 75 0.45 100 V pF
VEE Supply (referred to LG) VEE Iout finv VEEF Output Voltage/Io = 1 mA, Co = 1 µF Output Current/Vout = 0.70 · VEE Inverting Frequency Undervoltage Fault Indication -5 -20 -3 -6.5 -25 600 -7.5 V mA kHz V
-4.8
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© 2000 IXYS All rights reserved
IXBD4410 IXBD4411
Symbol Definition/Condition Characteristic Values (TA = 25°C, VDD = 15 V, unless otherwise specified) min. typ. max.
VDD Undervoltage Lockout Vuv Vuh Drop Out Hysteresis 9.5 0.1 10.5 0.15 11.5 0.3 V V
Quiescent Power Supply Current IDD VDD Current/Vin=VDD or LG, Io = 0 20 mA
INL and INH Inputs (Fig. 1a - 1c) td(on) tr td(off) tf tdlh(off) Turn-on delay time; 4410 Rise time; Turn-off delay time 4410 Fall time 4410/4412 Turn-on delay time vs. 4411 Turn-off delay time tdlh(on) 4410 Turn-on delay time vs. 4411 Turn-off delay time CL =1nF 60 150 ns CL =1nF 60 150 ns CL =1nF CL =10 nF CL =1 nF CL =1nF CL =10nF CL =1nF 110 70 15 70 70 15 175 100 20 150 150 20 ns ns ns ns ns ns
Fault Output Delay for any Fault Conditions (4410/4411) tFLT FLT Delay/Rpu = 2 k CL = 20 pF 200 300 ns
Overcurrent Protection Delay toc Driver-Off delay time CL = 1 nF 200 300 ns
Fig. 1a: IXBD4410/4411 Switching time test circuit © 2000 IXYS All rights reserved
Fig. 1b: Output signal waveform
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IX-1 IX-2 IX-3 IX-4 IX-5 IX-6 IX-7 IX-8
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