|Category||DSPs (Digital Signal Processors)|
|Description||Digital Signal Processor|
|Company||LSI Logic Corporation|
|Datasheet||Download LSI401Z datasheet
|L S I 4 0 1 Z Digital Signal Processor
Leading-edge Superscalar DSP Technology
The LSI401Z is a high-performance 16-bit fixed-point digital signal processor (DSP) based on the ZSPTM Architecture. This device has been designed for applications that require high data throughput capacity coupled with high-speed I/O, such as communications infrastructure equipment, and offers enhanced I/O capabilities and on-chip memory. The LSI401Z is capable of a maximum clock rate of 200 MHz for 800 MIPS peak performance and sustained effective throughput of 400 DSP MIPS (MACs). Memory The internal memory structure of the LSI401Z comprises 48K words of dualaccess RAM, 2K words of boot ROM and 2K words of data space dedicated to memory-mapped registers and external peripherals. Up to 40K words of the dual-access RAM can be used for instruction memory and up to 48K words for data memory. The boot ROM contains several routines, including internal self-test, on-chip debug support code, and boot-loader routines. The Memory Interface Unit (MIU) provides a glueless interface to industry-standard 16-bit asynchronous SRAMs and ROM devices, and/or to user-defined peripherals, and allows expansion of instruction and data space to 128K words. DMA The single-channel DMA controller of the LSI401Z can transfer either instructions or data from the internal memory space to or from the MIU, HPI, or either serial port. Zero-overhead data transfers are made from a dedicated area of internal dual-access RAM to these peripherals. The DMA controller has dedicated buses to access a maximum of 8K words of dual-access RAM so that no cycle stealing is required for these data transfers.
200 MHz operation at 2.5 V (5 ns cycle time) O n - b o a rd PLL for clock generation 4 8 K words RAM, 2 K words ROM on-chip D M A support for fast I/O transfers without cycle stealing 1 6 - b i t external memory interface Two on-board timers Two high-speed synchronous serial ports 1 6 - b i t host processor interface Fo u r - p i n programmable I/O port I E E E 1149.1-compliant JTAG port for realt i m e emulation and system download 2 0 8 MBGA package
4 0 0 MMAC sustained DSP performance Fl ex i b i l i t y to optimize power consumption R e d u c e d system memory cost H i g h data throughput without processor overhead H i g h data bandwidth to off-chip devices RTO S support and increased system integration H i g h - s p e e d link to I/O data streams S i m p l e interfacing to industry-standard micros Fl e x i b i l i t y for direct control of off-chip devices Lo w overhead on chip debug Ve r y high processing density per unit area
L S I 4 01 Z available in 0.25 mm technology.
LSI401Z Digital Signal Processor
Timers The LSI401Z has two identical 16-bit on-board timers for real-time interrupt generation. Each timer is fully programmable, and has a 6-bit pre-scaler and interrupt capability. The timers can automatically reload with the initial count so that periodic interrupts can be generated. Synchronous Serial Ports The device provides two identical synchronous serial ports that support 8- or 16-bit active or passive transfers. Transfers can be either burst or continuous, depending on whether data transfer is intermittent or in a continuous bit stream. The maximum transfer rate in active mode is 100 Mbps given a 200 MHz processor clock frequency. In passive mode, the maximum transfer rate is 200 Mbps. Host Processor Interface (HPI) The Host Processor Interface, or HPI, is an asynchronous 16-bit parallel port that is compatible with both Motorola and Intel style interfaces, and supports word (16-bit) transfers. The maximum transfer rate for the HPI is half of the processor clock frequency (100M words per second given a processor operating frequency of 200 MHz). Development Tools The ZSP Processor family is fully supported by a GNU-based compiler, linker and assembler, available for Windows 95/98/NT and Solaris 2 platforms. The ZSP Architecture enables the C compiler to produce code unrivaled in code density and execution speed by any DSP in its class, offering fast time to market with optimal performance and cost. An integrated debug environment is available for PC platforms. An LSI401Z development platform is available, offering the following features:
For more information please call: Europe +32.11.300.351 408.433.7700 Dept. JDS www.lsilogic.com LSI Logic Corporation North American Headquarters Milpitas, CA Tel: 408.433.8000 Fax: 408.433.8989 LSI Logic Europe Ltd European Headquarters Bracknell, United Kingdom Tel: 44.1344.426544 Fax: 44.1344.481039 LSI Logic KK Headquarters Tokyo, Japan Tel: 81.3.5463.7821 Fax: 81.3.5463.7820
ISO 9000 Certified
LSI Logic logo design is a registered trademark and ZSP is a trademark of LSI Logic Corporation. All other brand and product names may be trademarks of their respective companies. LSI Logic Corporation reserves the right to make changes to any products and services herein at any time without notice. LSI Logic does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by LSI Logic; nor does the purchase, lease, or use of a product or service from LSI Logic convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of LSI Logic or of third parties. Copyright ©1999 by LSI Logic Corporation. All rights reserved.
FLASH EPROM RS232C and JTAG-based host communication and code download 128K words asynchronous program/data memory Dual audio codecs
Order No. R20013 999.1K.CM.TP Printed in USA
|Some Part number from the same manufacture LSI Logic Corporation|
|LSI402Z Digital Signal Processor|
|LSI402ZX Detailedoverview of Features, Specifications, Functional Waveforms,signal Descriptions, Functional Descriptions, Instruction Setsummary And Block Diagram|
|LSI40909G-S Pci to Fibre Channel Host Adapter For Sun Solaris User's Guide Erratum-E1 V1.0 4/01|
|LSI53C040 Enclosure Services Processor Programming Guide V1.1 12/00|
|LSI53C1000 Pci to Ultra160 Scsi Controller Technical Manual V2.1 2/01|
|LSI53C1000R Pci to Ultra160 Scsi Controller Technical Manual V2.1 5/01|
|LSI53C1010-33 Pci to Dual Channel Ultra160 Scsi Multifunction Controller Technical Manual V3.2 2/01|
|LSI53C1010-66 Pci to Dual Channel Ultra160 Scsi Multifunction Controller Technical Manual V2.1 2/01|
|LSI53C1020 Pci-x to Ultra320 Scsi Controller Technical Manual V2.1 6/03|
|LSI53C1030 Pci-x to Dual Channel Ultra320 Scsi Multifunction Controller Technical Manual V2.1 6/03|
|LSI53C120 Ultra Scsi Bus Expander Technical Manual V1.0 8/01|
|LSI53C140 Ultra2 Scsi Bus Expander Technical Manual V2.1 9/01|
|LSI53C141 Scsi Bus Expander Technical Manual V2.1 11/00|
|LSI53C1510 I2O-Ready Pci Raid Ultra2 Scsi Controller Technical Manual V2.2 4/01|
|LSI53C180 Ultra160 Scsi Bus Expander Technical Manual V1.3 6/01|
|LSI53C320 Ultra320 Scsi Bus Expander Technical Manual V2.1 5/03|
|LSI53C770 Ultra Scsi I/o Processor Technical Manual V2.1 3/01|
FPBGA : Flip Chip Ball Grid Array (fpbga) Package Family
L64324 : Intelligent Ethernet Switch
LSI53C180 : SCSI bus expanders and enclosure Ultra160 Scsi Bus Expander Technical Manual V1.3 6/01
LSI53C860 : SCSI integrated circuits Pci to Ultra Scsi I/o Processor Technical Manual V2.1 4/01
LSIFC919 : Controllers Single Channel Fibre Channel I/o Processor Technical Manual V2.1 9/02
OAKDSPCORERCWDSPDV1660 : 16-bit High Performance DSP Core
RC11XT416 : RapidChip Xtreme Platform ASIC
LSISAS1064E : 4-Port PCI Express to 3Gb/s SAS Controller The LSISAS1064E is a four-port 3.0Gb/s Serial Attached SCSI (SAS) controller that is based on the Fusion-MPT™ (Message Passing Technology) architecture and provides an eight-lane PCI Express interface. The LSI Logic SAS integrated controller provides
AD1846 : Low Cost Parallel-port 16-bit Soundport Stereo Codec. Low Cost, Pin- and Register-Compatible Alternative to AD1848 Single-Chip Integrated Digital Audio Stereo Codec Supports the Microsoft Windows Sound System* Multiple Channels of Stereo Input and Output Analog and Digital Signal Mixing Programmable Gain and Attenuation On-Chip Signal Filters Digital Interpolation and Decimation Analog Output Low-Pass.
HMU16 : DSP Block. 16x16-bit CMOS Parallel Multipliers. The HMU16 and HMU17 are high speed, low power CMOS x 16-bit multipliers ideal for fast, real time digital signal processing applications. The X and Y operands along with their mode controls (TCX and TCY) have 17-bit input registers. The mode controls independently specify the operands as either two's complement or unsigned magnitude format, thereby.
HMU17 : DSP Block. 16x16-bit CMOS Parallel Multipliers. The HMU16 and HMU17 are high speed, low power CMOS x 16-bit multipliers ideal for fast, real time digital signal processing applications. The X and Y operands along with their mode controls (TCX and TCY) have 17-bit input registers. The mode controls independently specify the operands as either two's complement or unsigned magnitude format, thereby.
IDT7216 : DSP Block. DSP 16x16. x 16 parallel multiplier with double precision product 16ns clocked multiply time Low power consumption: 120mA Produced with advanced submicron CMOS high performance technology IDT7216L is pin- and function compatible with TRW MPY016H/K and AMD Am29516 IDT7217L requires a single clock with register enables making it pin- and function compatible with.
SI3016-KS : TMS320 Family. ti TMS320C54V90, Digital Signal Processor (DSP Only) For Embedded V90 Modem Solution.
TMP320C40KGDL60C : TMS320 Family->TMS320C4X Floating Point DSP. ti TMP320C40KGDC, Floating-point Digital Signal Processors KGD.
TMS320BC53SPZ : TMS320 Family->TMS320C5X Fixed Point DSP. ti TMS320BC53S, Digital Signal Processor.
TMS320C242PG : DSP Controller. D High-Performance Static CMOS Technology D Includes the T320C2xx Core CPU Object-Compatible With the TMS320C2xx Source-Code-Compatible With TMS320C25 Upwardly Compatible With 50-ns Instruction Cycle Time Pin Compatible to Emulation Device TMS320F241 (64-Pin/68-Pin) Code Compatible to Emulation Devices TMS320F243 and TMS320F241 Commercial and Industrial.
TMS320LC2402APG : TMS320 Family. ti TMS320LC2402A, 16-bit Fixed Point DSP With ROM. - 25-ns Instruction Cycle Time (40 MHz) - 40-MIPS Performance - Low-Power 3.3-V Design Based on TMS320C2xx DSP CPU Core - Code-Compatible With F243/F241/C242 - Instruction Set and Module Compatible With F240/C240 Flash (LF) and ROM (LC) Device Options LC2404A, LC2402A On-Chip Memory to 32K Words x 16 Bits of Flash EEPROM (4 Sectors) or ROM - Programmable.
TMS320VC5410A-120 : TMS320 Family. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,.
TMS320VC5420-200 : TMS320 Family. Independent Subsystems Each Core Has an Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Bus 40-Bit Arithmetic Logic Unit (ALU) Including a 40-Bit Barrel-Shifter and Two 40-Bit Accumulators Per Core Each Core Has × 17-Bit Parallel Multiplier Coupled a 40-Bit Adder for Non-Pipelined Single-Cycle Multiply/ Accumulate.
TMS320VC5471 : TMS320 Family. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,.
TMS320VC5510AGGW1 : TMS320 Family. ti TMS320VC5510, Digital Signal Processor. PRODUCTION DATA information is current as of publication date. Products conform to s per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,.
56F84789VLL : This Family Of Digital Signal Controllers (DSCs) Is • This family of digital signal controllers (DSCs) is based on the 32-bit 56800EX core. Each device combines, on a single chip, the processing power of a DSP and the functionality of an MCU with a flexible set of peripherals to support many target applications: – Industrial control.