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Details, datasheet, quote on part number:MX23L25610
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Datasheet text preview:
MX23L25610
256M-BIT (16M x 16 / 32M x 8) MASK ROM WITH PAGE MODE (TSOP ONLY)
FEATURES
· Bit organization - 32M x 8 (byte mode) - 16M x 16 (word mode) · Fast access time - Random access: 100ns (max.) - Page access: 30ns (max.) · Page Size - 8 words per page · Current - Operating: 30mA (max.) @ 5MHz - Standby: 15uA (max.) · Supply voltage - 3.0V ~ 3.6V · Package - 56 pin TSOP · Temperature - 0~70° C
PIN CONFIGURATION 56 TSOP
A22 NC A21 A20 A19 A18 A17 A16 VCC A15 A14 A13 A12 CE# NC NC A11 A10 A9 A8 GND A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 A24 NC OE# NC D15 D7 D14 D6 GND D13 D5 D12 D4 VCC GND D11 D3 D10 D2 VCC D9 D1 D8 D0 A0 BYTE# A23 NC
MX23L25610
PIN DESCRIPTION
Symbol A0~A24 D0~D15 CE# OE# BYTE# VCC VSS NC Pin Function Address Inputs, A0 not used in word mode Data Outputs Chip Enable Input Output Enable Input Word/Byte Mode Selection Power Supply Pin Ground Pin No Connection
P/N:PM0873
REV. 1.6, JUN. 06, 2003
1
MX23L25610
MODE SELECTION
CE# H L L L OE# X H L L BYTE# X X H L D0~D7 High Z High Z D0~D7 D0~D7 D8~D15 High Z High Z D8~D15 High Z Mode Word Byte Power Stand-by Active Active Active
BLOCK DIAGRAM
A0 A3 A4 A24 CE# BYTE# OE# Address Buffer Memor y Array Page Buffer Page Decoder Word/ Byte Output Buffer D0 D15/(D7)
ORDER INFORMATION
Part No. *MX23L25610TC-10 *MX23L25610TC-12 Access Time 100ns 120ns Package 56 pin TSOP 56 pin TSOP VCC 3.0V~3.6V (under development) 3.0V~3.6V (under development)
ABSOLUTE MAXIMUM RATINGS
Item Voltage on any Pin Relative to VSS Ambient Operating Temperature Storage Temperature Symbol VIN Topr Tstg Ratings -0.3V to 3.9V 0° to 70° C C -65° to 125° C C
P/N:PM0873
REV. 1.6, JUN. 06, 2003
2
MX23L25610
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.0V ~ 3.6V)
Item Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Output Leakage Current Operating Current Symbol VOH VOL VIH VIL ILI ILO ICC MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.2xVCC 10uA 10uA 30mA 0V, VCC 0V, VCC f=5MHz, all output open CE#=VIL(Chip Enable) OE#=VIH(Output Disabled) Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance ISTB1 ISTB2 CIN COUT 1mA 15uA 10pF 10pF CE# = VIH CE# > VCC-0.2V Ta = 25°C, f = 1MHZ Ta = 25°C, f = 1MHZ Conditions IOH = -0.4mA IOL = 1.6mA
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.0V ~ 3.6V)
Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Z Delay Symbol tRC tAA tCE tPA tOE tOH tHZ 23L25610-10 MIN. 100ns 0ns MAX. 100ns 100ns 30ns 30ns 20ns 23L25610-12 MIN. 120ns 0 0ns MAX. 120ns 120ns 30ns 30ns 20ns
AC Test Conditions
Input Pulse Levels Input Rise and Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 2.4V 10ns 1.5V 1.5V See Figure
IOL (load)=1.6mA C< 100pF IOH (load)= -0.4mA DOUT
Note:No output loading is present in tester load board. Active loading is used and under software programming control. Output loading capacitance includes load board's and all stray capacitance.
P/N:PM0873
REV. 1.6, JUN. 06, 2003
3
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