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Details, datasheet, quote on part number:MX27C4100-12
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Datasheet text preview:
MX27C4100/27C4096
4M-BIT [512K x 8/256K x 16] CMOS EPROM
FEATURES
· 256K x 16 organization(MX27C4096, JEDEC pin · · · ·
out) 512K x 8 or 256K x 16 organization(MX27C4100, ROM pin out compatible) +12.5V programming voltage Fast access time: 100/120/150 ns Totally static operation
· · · ·
Completely TTL compatible Operating current: 60mA Standby current: 100uA Package type: - 40 pin plastic DIP - 44 pin PLCC - 40 pin SOP
GENERAL DESCRIPTION
The MX27C4100/4096 is a 5V only, 4M-bit, One Time Programmable Read Only Memory. It is organized as 256K words by 16 bits per word(MX27C4096), 512K x 8 or 256K x 16(MX27C4100), operates from a single + 5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM programmers may be used. The MX27C4100/4096 supports a intelligent fast programming algorithm which can result in programming time of less than two minutes. This EPROM is packaged in industry standard 40 pin dual-in-line packages, 40 lead SOP, and 44 lead PLCC packages.
PIN CONFIGURATIONS
SOP/PDIP(MX27C4100)
BLOCK DIAGRAM (MX27C4100)
CE
A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
OE BYTE/VPP
CONTROL LOGIC
OUTPUT BUFFERS
Q0~Q14 Q15/A-1
MX27C4100
. . . . . . . . VCC GND
Y-DECODER
. . . . . . . .
Y-SELECT
A0~A17 ADDRESS INPUTS
X-DECODER
4M BIT CELL MAXTRIX
P/N: PM0197
1
REV. 3.6, NOV. 19, 2002
MX27C4100/27C4096
PIN CONFIGURATIONS
PLCC(MX27C4096)
VCC VPP Q13 Q14 Q15 A17 A16 A15 A14 NC CE
PIN CONFIGURATIONS
PDIP(MX27C4096)
VPP CE Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 GND Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VCC A17 A16 A15 A14 A13 A12 A11 A10 A9 GND A8 A7 A6 A5 A4 A3 A2 A1 A0
Q12 Q11 Q10 Q9 Q8 GND NC Q7 Q6 Q5 Q4
7
6
1 44
40 39
A13 A12 A11 A10 A9
12
MX27C4096
34
GND NC A8 A7 A6
17 18
Q3 Q2 Q1 Q0 OE
23
A0 A1 A2 A3 NC
29 28
A4
A5
BLOCK DIAGRAM (MX27C4096)
CE OE
CONTROL LOGIC
OUTPUT BUFFERS
Q0~Q15
. . A0~A17 ADDRESS INPUTS . . . . . .
Y-DECODER
. . . . . . . .
Y-SELECT
X-DECODER
4M BIT CELL MAXTRIX
VCC GND
VPP
P/N: PM0197
MX27C4096
REV. 3.6, NOV. 19, 2002
2
MX27C4100/27C4096
PIN DESCRIPTION(MX27C4100)
SYMBOL A0~A17 Q0~Q14 CE OE BYTE/VPP Q15/A-1 VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Word/Byte Selection/Program Supply Voltage Q15(Word mode)/LSB addr. (Byte mode) Power Supply Pin (+5V) Ground Pin
PIN DESCRIPTION(MX27C4096)
SYMBOL A0~A17 Q0~Q15 CE OE VPP VCC GND PIN NAME Address Input Data Input/Output Chip Enable Input Output Enable Input Program Supply Voltage Power Supply Pin (+5V) Ground Pin
TRUTH TABLE OF BYTE FUNCTION(MX27C4100)
BYTE MODE(BYTE = GND)
CE H L L OE X H L Q15/A-1 X X A-1 input MODE Non selected Non selected Selected Q0-Q7 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1)
WORD MODE(BYTE = VCC)
CE H L L NOTE : X = H or L OE X H L Q15/A-1 High Z High Z DOUT MODE Non selected Non selected Selected Q0-Q14 High Z High Z DOUT SUPPLY CURRENT Standby(ICC2) Operating(ICC1) Operating(ICC1)
P/N: PM0197
REV. 3.6, NOV. 19, 2002
3
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