|Description||4m-bit [512kx8] CMOS Flash Memory|
|Company||Macronix America, Inc.|
|Datasheet||Download MX29F002B datasheet
x 8 only Single power supply operation - 5.0V only operation for read, erase and program operation Fast access time: 70/90/120ns Low power consumption - 30mA maximum active current - 1uA typical standby current Command register architecture - Byte Programming (7us typical) - Sector Erase (Sector structure:16KB/8KB/8KB/32KB and 64KBx7) Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address Erase suspend/Erase Resume - Suspends an erase operation to read data from, or program data to, another sector that is not being erased, then resumes the erase. Status Reply - Data polling & Toggle bit for detection of program and erase cycle completion. Chip protect/unprotect for 5V only system or 5V/12V system. 100,000 minimum erase/program cycles Latch-up protected to 100mA from to VCC+1V Low VCC write inhibit is equal to or less than 3.2V Package type: - 32-pin PLCC, TSOP or PDIP Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash 20 years data retention
The a 4-mega bit Flash memory organized as 512K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write nonvolatile random access memory. The MX29F004T/B is packaged in 32-pin PLCC, TSOP, PDIP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29F004T/B offers access time as fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F004T/B has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F004T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29F004T/B uses a 5.0V±10% VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses to 100 milliamps on address and data pin from -1V to VCC + 1V.
SYMBOL WE OE GND VCC PIN NAME Address Input Data Input/Output Chip Enable Input Write Enable Input Output Enable Input Ground Pin +5.0V single power supply
Sector Size Sector A14 A13 (Kbytes) Address Range (in hexadecimal) (x8) Address Range 7A000h-7BFFFh 7C000h-7FFFFh
Sector Size Sector A14 A13 (Kbytes) Address Range (in hexadecimal) (x8) Address Range 60000h-6FFFFh 70000h-7FFFFh
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