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Details, datasheet, quote on part number:MX29F016TI-90
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Datasheet text preview:
MX29F016
16M-BIT [2M X 8] CMOS EQUAL SECTOR FLASH MEMORY
FEATURES
· Single power supply 5V operation for read, erase and program · Fast access time: 90/120ns · Low power consumption - 30mA maximum active current - 0.2uA typical standby current · Command register architecture - Byte Programming (7us typical) - Sector Erase:32 equal sector with of 64KByte each · Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address · Erase suspend/Erase Resume - Suspends an erase operation to read data from, or program data to, another sector that is not being erased, then resumes the erase. · Status Reply - Data polling & Toggle bit for detection of program and erase cycle completion. · Group Sector protect/unprotect for 5V/12V system. · Group Sector protection - Hardware sector protect/unprotect method for each group which consists of two adjacent sectors - Temporary group sector unprotect allows code changes in previously locked sectors · 100,000 minimum erase/program cycles · Latch-up protected to 100mA from -1V to VCC+1V · Low VCC write inhibit is equal to or less than 3.2V · Package type: - 40-pin TSOP, 44-pin SOP, 48-pin TSOP · Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash
GENERAL DESCRIPTION
The MX29F016 is a 16-mega bit Flash memory organized as 2M bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F016 is packaged in 40-pin TSOP or 44-pin SOP, 48-pin TSOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29F016 offers access time as fast as 90ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F016 has separate chip enable (CE) and output enable (OE ) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F016 uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. M X I C Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of advanced tunnel oxide processing a n d low internal electric fields for erase and programming operations produces reliable cycling. The MX29F016 uses a 5.0Vą10% VCC supply to p e r f o r m the High Reliability Erase and auto Program/Erase algorithms. T h e highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
P/N:PM0590
REV. 1.4, NOV. 21, 2002
1
MX29F016
PIN CONFIGURATIONS
40 TSOP (Standard Type) (10mm x 20mm)
A19 A18 A17 A16 A15 A14 A13 A12 CE VCC NC RESET A11 A10 A9 A8 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A20 NC WE OE RY/BY Q7 Q6 Q5 Q4 VCC VSS VSS Q3 Q2 Q1 Q0 A0 A1 A2 A3
48 TSOP (Standard Type) (12mm x 20mm)
NC NC A19 A18 A17 A16 A15 A14 A13 A12 CE VCC NC RESET A11 A10 A9 A8 A7 A6 A5 A4 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC A20 NC WE OE RY/BY Q7 Q6 Q5 Q4 VCC VSS VSS Q3 Q2 Q1 Q0 A0 A1 A2 A3 NC NC
MX29F016
MX29F016
44 SOP
NC RESET A11 A10 A9 A8 A7 A6 A5 A4 NC NC A3 A2 A1 A0 Q0 Q1 Q2 Q3 VSS VSS 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 VCC CE A12 A13 A14 A15 A16 A17 A18 A19 NC NC A20 NC WE OE RY/BY Q7 Q6 Q5 Q4 VCC
PIN DESCRIPTION
SYMBOL A0~A20 Q0~Q7 CE WE OE RESET RY/BY VCC VSS NC PIN NAME Address Input 8 Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Hardware Reset Pin, Active Low Read/Busy Output +5.0V single power supply Device Ground Pin Not Connected Internally
P/N:PM0590
MX29F016
REV. 1.4, NOV. 21, 2002
2
MX29F016
MX29F016 SECTOR ADDRESS TABLE
Group Sector A 2 0 A 1 9 A 1 8 A 1 7 A 1 6 Address Range Sector SGA0 SA0 SGA0 SA1 SGA0 SA2 SGA0 SA3 SGA1 SA4 SGA1 SA5 SGA1 SA6 SGA1 SA7 SGA2 SA8 SGA2 SA9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 000000h-00FFFFh 010000h-01FFFFh 020000h-02FFFFh 030000h-03FFFFh 040000h-04FFFFh 050000h-05FFFFh 060000h-06FFFFh 070000h-07FFFFh 080000h-08FFFFh 090000h-09FFFFh 0A0000h-0AFFFFh 0B0000h-0BFFFFh 0C0000h-0CFFFFh 0D0000h-0DFFFFh 0E0000h-0EFFFFh 0F0000h-0FFFFFh 100000h-10FFFFh 110000h-11FFFFh 120000h-12FFFFh 130000h-13FFFFh 140000h-14FFFFh 150000h-15FFFFh 160000h-16FFFFh 170000h-17FFFFh 180000h-18FFFFh 190000h-19FFFFh 1A0000h-1AFFFFh 1B0000h-1BFFFFh 1C0000h-1CFFFFh 1D0000h-1DFFFFh 1E0000h-1EFFFFh 1F0000h-1FFFFFh
LOGIC SYMBOL
21 A0-A20 Q0-Q7 8
CE OE WE RESET RY/BY
SGA2 SA10 0 SGA2 SA11 0 SGA3 SA12 0 SGA3 SA13 0 SGA3 SA14 0 SGA3 SA15 0 SGA4 SA16 1 SGA4 SA17 1 SGA4 SA18 1 SGA4 SA19 1 SGA5 SA20 1 SGA5 SA21 1 SGA5 SA22 1 SGA5 SA23 1 SGA6 SA24 1 SGA6 SA25 1 SGA6 SA26 1 SGA6 SA27 1 SGA7 SA28 1 SGA7 SA29 1 SGA7 SA30 1 SGA7 SA31 1
Legend:SA=Sector Address ; SGA=Sector Group Address Note:All sectors are 64 Kbytes in size.
P/N:PM0590
REV. 1.4, NOV. 21, 2002
3
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