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Details, datasheet, quote on part number:MX29L3211TC-10
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| Part: | MX29L3211TC-10 |
| Category: | Memory => Flash => Page Mode/MROM Pin Out Compatible Flash Memory |
| Description: | Access Time: 100ns; 32M-bit (4M X 8/2M X 16) CMOS Single Voltage Pagemode Flash EePROM |
| Company: | Macronix America, Inc. |
| Datasheet: | Download MX29L3211TC-10 datasheet File size : 655 kB |
| Request For quote: | Find where to buy MX29L3211TC-10
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Datasheet text preview:
A D V A N C E D INFORMATION
MX29L3211
32M-BIT [4M x 8/2M x 16] CMOS SINGLE VOLTAGE PAGEMODE FLASH EEPROM
FEATURES
· · · · · · 3.3V ± 10% write, erase and read Endurance: 10,000 cycles Fast random access time: 100ns/120ns Fast pagemode access time: 50ns Page access depth: 16 bytes/8 words Sector erase architecture - 32 equal sectors of 64K word each - Sector erase time: 200ms typical · Auto Erase and Auto Program Algorithms - Automatically erases any one of the sectors or the whole chip with Erase Suspend capability - Automatically programs and verifies data at specified addresses · Status Register feature for detection of program or erase cycle completion · Low VCC write inhibit is equal to or less than 1.8V · Software data protection · Page program operation - Internal address and data latches for 256 bytes/128 words per page - Page programming time: 5ms typical · Low power dissipation - 50mA active current - 20uA standby current · Two independently Protected sectors · Industry standard surface mount packaging - 44 pin SOP (500mil) - 48 TSOP(I)
GENERAL DESCRIPTION
The MX29L3211 is a 32-mega bit pagemode Flash memory organized as either 4M word x 8 or 2M byte x 16. The MX29L3211 includes 32 sectors of 64K words. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory and fast page mode access. The MX29L3211 is packaged 44-pin SOP and 48-pin TSOP. It is designed to be reprogrammed and erased in-system or in-standard EPROM programmers. The standard MX29L3211 offers access times as fast as 100ns,allowing operation of high-speed microprocessors without wait. To eliminate bus contention, the MX29L3211 has separate chip enable CE, output enable (OE), and write enable (WE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29L3211 uses a command register to manage this functionality. To allow for simple in-system reprogrammability, the MX29L3211 does not require high input voltages for programming. Three-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. MXIC Flash technology reliably stores memory contents even after 10,000 cycles. The MXIC's cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29L3211 uses a 3.3V ± 10% VCC supply to perform the Auto Erase and Auto Program algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC +1V.
P/N:PM0641
REV. 0.4, NOV. 21, 2002
1
MX29L3211
PIN CONFIGURATIONS
44 SOP(500mil)
WE A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
PIN DESCRIPTION
SYMBOL A0 - A20 Q0 - Q14 Q15/A-1 CE OE WE BYTE VCC GND PIN NAME Address Inputs Data Input/Output Q15(Word mode)/LSB Address (Byte mode) Chip Enable Input Output Enable Input Write Enable Input BYTE/Word Mode Selection Power Supply Ground Pin
48 TSOP (Normal Type)
BYTE A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 GND A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 GND GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC VCC WE Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE GND GND
MX29L3211 (Normal Type)
P/N:PM0641
MX29L3211
REV. 0.4, NOV. 21, 2002
2
MX29L3211
BLOCK DIAGRAM
WRITE CE WE OE BYTE CONTROL INPUT LOGIC HIGH VOLTAGE MACHINE (WSM) PROGRAM/ERASE STATE
MX29L3211 FLASH ARRAY ARRAY
ADDRESS Q15/A-1 A0-A20 LATCH AND BUFFER
COMMAND INTERFACE REGISTER (CIR)
X-DECODER
Y-DECODER
Y-PASS GATE
SOURCE HV COMMAND DATA DECODER
SENSE AMPLIFIER
PGM DATA HV COMMAND DATA LATCH
Y-select PROGRAM DATA LATCH
Q0-Q15/A-1
I/O BUFFER
P/N:PM0641
REV. 0.4, NOV. 21, 2002
3
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