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Details, datasheet, quote on part number:MX29LV004BQC-90G
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Datasheet text preview:
MX29LV004T/B
4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 3V ONLY FLASH MEMORY
FEATURES
· Extended single - supply voltage range 2.7V to 3.6V · 524,288 x 8 · Single power supply operation - 3.0V only operation for read, erase and program operation · Fast access time: 55R/70/90ns · Low power consumption - 20mA maximum active current - 0.2uA typical standby current · Command register architecture - Byte Programming (9us typical) - Sector Erase (Sector structure 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7) · Auto Erase (chip & sector) and Auto Program - Automatically erase any combination of sectors with Erase Suspend capability. - Automatically program and verify data at specified address · Erase suspend/Erase Resume - Suspends sector erase operation to read data from, or program data to, any sector that is not being erased, then resumes the erase. · Status Reply - Data polling & Toggle bit for detection of program and erase operation completion. · Ready/Busy pin (RY/BY) - Provides a hardware method of detecting program or erase operation completion. · Sector protection - Hardware method to disable any combination of sectors from program or erase operations - Temporary sector unprotect allows code changes in previously locked sectors. · 100,000 minimum erase/program cycles · Latch-up protected to 100mA from -1V to VCC+1V · Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector · Package type: - 40-pin TSOP - 32-pin PLCC · Compatibility with JEDEC standard - Pinout and software compatible with single-power supply Flash · 20 years data retention
GENERAL DESCRIPTION
The MX29LV004T/B is a 4-mega bit Flash memory organized as 512K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29LV004T/ B is packaged in 40-pin TSOP and 32-pin PLCC. It is designed to be reprogrammed and erased in system or in standard EPROM programmers. The standard MX29LV004T/B offers access time as fast as 55ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29LV004T/B has separate chip enable (CE) and output enable (OE) controls. MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV004T/B uses a command register to manage this functionality. The command register allows for 100% TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility. MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cycling. The MX29LV004T/B uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms. The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.
P/N:PM0732
REV. 1.6, JAN. 22, 2003
1
MX29LV004T/B
PIN CONFIGURATIONS 40 TSOP (Standard Type) (10mm x 20mm)
A16 A15 A14 A13 A12 A11 A9 A8 WE RESET NC RY/BY A18 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A17 GND NC NC A10 Q7 Q6 Q5 Q4 VCC VCC NC Q3 Q2 Q1 Q0 OE VSS CE A0
MX29LV004T/B
32 PLCC
VCC A12 A15 A16 A18 A17 WE
PIN DESCRIPTION
SYMBOL A0~A18
A14 A13 A8 A9 9
PIN NAME Address Input Data Input/Output Chip Enable Input Write Enable Input Hardware Reset Pin/Sector Protect Unlock (for 40-TSOP) Output Enable Input Ready/Busy Output (for 40-TSOP) Power Supply Pin (2.7V~3.6V) Ground Pin
A7 A6 A5 A4 A3 A2 A1 A0 Q0
5
4
1
32
30 29
Q0~Q7 CE WE RESET OE RY/BY VCC GND
MX29LV004T/B
25
A11 OE A10 CE
13 14
Q1 Q2 GND
17
Q3 Q4 Q5
21 20
Q6
Q7
P/N:PM0732
REV. 1.6, JAN. 22, 2003
2
MX29LV004T/B
BLOCK STRUCTURE Table 1: MX29LV004T SECTOR ARCHITECTURE
Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Sector Size Byte Mode 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 32Kbytes 8Kbytes 8Kbytes 16Kbytes Address range Byte Mode (x8) 00000-0FFFF 10000-1FFFF 20000-2FFFF 30000-3FFFF 40000-4FFFF 50000-5FFFF 60000-6FFFF 70000-77FFF 78000-79FFF 7A000-7BFFF 7C000-7FFFF A18 A17 0 0 0 0 1 1 1 1 1 1 1 0 0 1 1 0 0 1 1 1 1 1 Sector Address A16 0 1 0 1 0 1 0 1 1 1 1 A15 X X X X X X X 0 1 1 1 A14 X X X X X X X X 0 0 1 A13 X X X X X X X X 0 1 X
Table 2: MX29LV004B SECTOR ARCHITECTURE
Sector SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Sector Size Byte Mode 16Kbytes 8Kbytes 8Kbytes 32Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes 64Kbytes Address range Byte Mode (x8) 00000-03FFF 04000-05FFF 06000-07FFF 08000-0FFFF 10000-1FFFF 20000-2FFFF 30000-3FFFF 40000-4FFFF 50000-5FFFF 60000-6FFFF 70000-7FFFF A18 A17 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 0 0 1 1 Sector Address A16 0 0 0 0 1 0 1 0 1 0 1 A15 0 0 0 1 X X X X X X X A14 0 1 1 X X X X X X X X A13 X 0 1 X X X X X X X X
P/N:PM0732
REV. 1.6, JAN. 22, 2003
3
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